CMOSTEK CMT2380F17 Manual page 323

CKCON4 Clock Control 4
CKCON5 Clock Control 5
PCON2 Power Control 2
PCON3 Power Control 3
SFR Page
SPCON0
Control 0
DCON0 Device Control 0
RTCCR RTC Control Reg. 54H
RTC Timer
RTCTM
Register
Logical Bytes
PCON0 Power Control 0
PCON1 Power Control 1
CKCON0 Clock Control 0
Watch-dog-timer
WDTCR
Control register
P4 Port 4
P6 Port 6
Sample Code of
Page-P
SFR write：
IFADRH =
0x00;
ISPCR = ISPEN;
IFMT = MS2;
IFADRL = SPCON0;
IFD |= CKCTL0;
SCMD = 0x46;
SCMD = 0xB9;
IFMT = Flash_Standby;
standby，IFMT =0x00 ISPCR &= ~ISPEN;
42H RCSS2 RCSS1
43H -- --
44H AWBOD1 0
45H IVREN 0
48H -- P6CTL
4CH HSE IAPO
RTCE RTCO
55H RTCCS1 RTCCS0
87H SMOD1 SMOD0
97H SWRF EXRF
C7H AFS ENCKM
E1H WREN NSW
E8H P4.7 --
F8H -- --
RCSS0 RPSC2 RPSC1
-- -- --
BO1S1 BO1S0 BO1RE
0 0 0
P4CTL WRCTL --
HSE1 -- --
RTCRL5 RTCRL4 RTCRL3
RTCCT5 RTCCT4 RTCCT3
GF POF0 GF1
-- RTCF --
CKMIS1 CKMIS0 CCKS
ENW CLRW WIDL
P4.5 P4.4 --
-- -- --
//enable IAP/ISP
// Page-P write，IFMT =0x04
//Set Page-P SFR address
// set CKCTL0
//
//
// IAP/ISP
Rev0.1 | 323/347
CMT2380F17
RPSC0 RTCCS3 RTCCS2 00000000
-- -- CKMS0 00000000
EBOD1 BO0RE 1
0 0 0
CKCTL0 PWCTL1 PWCTL0 00000000
IORCTL RSTIO OCDE
RTCRL2 RTCRL1 RTCRL0 00111111
RTCCT2 RTCCT1 RTCCT0 01111111
GF0 PD IDL
BOF1 BOF0 WDTF
SCKS2 SCKS1 SCKS0
PS2 PS1 PS0
-- -- --
-- P6.1 P6.0
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00000000
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00010000
0000x000
00010000
00000000
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