CMOSTEK CMT2380F17 Manual page 245

Ultra low power sub-1ghz wireless mcu
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the baud rate for S1 Mode 0 and Mode 4.
S1 in mode 2:
0: Clear to select UART1 baud rate as SYSCLK/32 or /64. 1: Set to select UART1 baud rate as
SYSCLK/96 or /192.
Bit 5: S1DOR, Serial Port 1 data order control in all operating modes. If S1TME = 0:
0: The MSB of the data byte is transmitted first.
1: The LSB of the data byte is transmitted first. S1DOR is set to "1" in default.
If S1TME = 1:
0: Set the S1BRG to 8-bit reload timer/counter mode. 1: Set the S1BRG to 16-bit timer/counter mode.
Bit 4: S1TR, UART1 Baud Rate Generator control bit. 0: Clear to turn off the S1BRG.
1: Set to turn on S1BRG.
Bit 3: S1MOD1, UART1 double baud rate enable bit. 0: Disable the double baud rate function for UART1.
1: Enable the double baud rate function for UART1.
Bit 2: S1TX12, UART1 Baud Rate Generator clock source select 0: Clear to select SYSCLK/12 as the
clock source for S1BRG.
1: Set to select SYSCLK as the clock source for S1BRG.
Bit 1: S1CKOE, Serial Port 1 BRG Clock Output Enable. 0: Disable the S1CKO output on the port pin.
1: Enable the S1CKO output on the port pin.
Bit 0: S1TME, Serial port 1 BRG Timer Mode Enabled. 0: Keep S1BRT to service Serial Port 1 (UART1).
1: Disable Serial Port 1 function and release the S1BRT as an 8-bit auto-reload timer. In this mode, there
is an additional function for RXD1 port pin change detector.
AUXR9: Auxiliary Register 9
SFR Page
= 6 only
SFR Address = 0xA4
Bit
7
Name
--
R/W
W
Reset V alue
0
Bit 1~0: S1PS1~0, Serial Port 1 pin Selection [1:0].
AUXR6:Auxiliary Register 6
SFR Page
= 3 only
SFR Address = 0xA4
Bit
7
Name
KBI4PS1
R/W
R/W
Reset V alue
0
Bit 1: SnMIPS, S0MI & S1MI Port pin Selection.
6
5
--
T1G1
W
R/W
0
0
S1PS1, S1PS0
00
01
10
11
6
5
KBI4PS0
KBI6PS0
R/W
R/W
0
0
SnMIPS
0
Rev0.1 | 245/347
4
3
T0G1
C0FDC1
R/W
R/W
0
0
RxD1
P1.0
P6.0
P4.4
P3.4
4
3
KBI2PS0
T3FCS
R/W
R/W
0
0
S0MI
S1MI
P1.6
P6.1
CMT2380F17
2
1
C0FDC0
S1PS1
R/W
R/W
0
0
TxD1
P1.1
P6.1
P4.5
P3.5
2
1
T2FCS
SnMIPS
R/W
R/W
0
0
www.cmostek.com
0
S1PS0
R/W
0
0
S0COPS
R/W
0

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