Adc Conversion Rate; Adc Interrupts - CMOSTEK CMT2380F17 Manual

(2) Enable the ADC interrupt by setting bits EADC (in EIE1 register) and EA (in IE register), and then the
CPU will jump into its Interrupt Service Routine when the conversion is completed. Regardless of (1) or (2),
the ADCI flag should be cleared by software before next conversion.使用

26.2.4 ADC Conversion Rate

The user can select the appropriate conversion speed according to the frequency of the analog input
signal. The maximum input clock of the ADC is 24MHz and it operates a minimum conversion time with 30
ADC clocks. User can configure the ADCKS2~0 (ADCFG0.7~5), SHT (ADCFG2.7~0) and HA (ADCFG3.5) to
specify the conversion rate. The following equation is the clock number of one ADC conversion:
Please note is the input signal is AC signal, fN, and assume the sample rate is fS, based on Nyquist theorem,
fS should large than 2 times fN to ensure the measurement accuracy.
For example,
1. To get 800K Sample Rate:
If SYSCLK= 24MHz and the ADCKS = SYSCLK is selected, SHT = 0, Then conversion rate fS =
24MHz/(30+0) = 800K sps.
(In this case, the AC input signal fN frequency should lower than 400KHz to ensure the measurement
accuracy.)
2. To get 150K Sample Rate:
If SYSCLK= 24MHz and the ADCKS = SYSCLK/4 is selected, SHT = 10, Then conversion rate fS =
24MHz/4/(30+10) = 150K sps.
(In this case, the AC input signal fN frequency should lower than 75KHz to ensure the measurement
accuracy.)

26.2.5 ADC Interrupts

The ADC interrupt of CMT2380F17 includes 3 sources:
1. ADCI, when an A/D conversion is completed, ADCI will be set to invoke an interrupt. The interrupt
on this flag can be blocked by IGADCI (ADCFG1.7).
2. SMPF, it is set when an ADC channel sample & hold is completed to invoke an interrupt. The
interrupt on this flag can be blocked by SMPFIE (ADCFG1.5).
3. ADCWI, under ADC Window Compare mode, this Interrupt flag will be held when Window
Comparison Data match has occurred. An interrupt is invoked if it is enabled. The interrupt on this flag can be
enabled by EADCWI. (ADCFG1.6)有 3 种 ADC 中断源：
Figure 26–2. ADC Interrupt
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CMT2380F17
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