CMOSTEK CMT2380F17 Manual page 243

1 0
1 0
1 1
1 1
Bit 5: Serial port 1 mode bit 2. 0: Disable SM21 function.
1: Enable the automatic address recognition feature in Modes 2 and 3. If SM21=1, RI1 will not be set
unless the received 9th data bit is 1, indicating an address, and the received byte is a given or Broadcast
address. In mode1, if SM21=1 then RI1 will not be set unless a valid stop Bit was received, and the
received byte is a given or Broadcast address. In Mode 0, SM21 should be 0.
Bit 4: REN1, Enable serial reception.
0: Clear by software to disable reception. 1: Set by software to enable reception.
Bit 3: TB81, The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as
desired.
Bit 2: RB81, In Modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM21 = 0, RB81 is the
stop bit that was received. In Mode 0, RB81 is not used.
Bit 1: TI1. Transmit interrupt flag. 0: Must be cleared by software.
1: Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of the stop bit in the other
modes, in any serial transmission.
Bit 0: RI1. Receive interrupt flag. 0: Must be cleared by software.
1: Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the stop bit time in the
other modes, in any serial reception (except see SM21).
0 4 SPI Master
1 5 Reserved
0 6 Reserved
1 7 Reserved
Rev0.1 | 243/347
CMT2380F17
SYSCLK/12 or SYSCLK/4
Reserved
Reserved
Reserved
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