Timer 3 Register - CMOSTEK CMT2380F17 Manual

Ultra low power sub-1ghz wireless mcu
Table of Contents

Advertisement

How to Program Split Timer 3 in Clock-out Mode
Select TL3 clock source.
Determine the 8-bit reload value from the formula and enter it in the RCAP3L register.
Enter the same reload value as the initial value in the TL3 register.
Set T3OE bit in T3MOD register.
Set TR3L bit in T3CON register to start the Timer 3.
In the Clock-Out mode, TL3 rollovers will not generate an interrupt, TF3L. This is similar to when TL3 is
used as a baud-rate generator. It is possible to use TL3 as a baud rate generator and a clock generator
simultaneously. Note, however, that the baud-rate and the clock-out frequency depend on the same overflow
rate of TL3 in split Timer 3. The TF3L interrupt is enabled by TL3IE in T3CON register.

16.3.11 Timer 3 Register

T3CON:Timer 3 Control Register
SFR Page
= 1 Only
SFR Address = 0xC8
Bit
7
Name
TF3
R/W
R/W
Reset V alue
0
Bit 7: TF3, Timer 3 overflow flag.
0: TF3 must be cleared by software.
1: TF3 is set by a Timer 3 overflow happens.
Bit 6: EXF3, Timer 3 external flag.
0: EXF3 must be cleared by software.
1: Timer 3 external flag set when either a capture or reload is caused by a negative transition on T3EX
pin and EXEN3=1 or a positive transition on T3EX and T3EXH=1. When Timer 3 interrupt is enabled,
EXF3=1 will cause the CPU to vector to the Timer 3 interrupt routine. When the MCU is in power-down
mode and Timer 3 interrupt is enabled, the EXF3 is forced to level-sensitive triggered with wake-up MCU
capability.
Bit 5: TF3L, TL3 overflow flag in Timer 3 split mode.
0: TF3L must be cleared by software.
1: TF3L is set by TL3 overflow happened in Timer 3 split mode.
Bit 4: TL3IE, TF3L interrupt enable.
0: Disable TF3L interrupt.
1: Enable TF3L interrupt to share the Timer 3 interrupt vector.
Bit 3: EXEN3, Timer 3 external enable flag on a negative transition of the Timer 3 external input.
0: Cause Timer 3 to ignore negative transition events at Timer 3 external input.
1: Allows a capture or reload to occur as a result of a 1-to-0 transition on Timer 3 external input. If Timer 3
Figure 16-39. Split Timer 3 in Clock-Out Mode
6
5
EXF3
TF3L
R/W
R/W
0
0
Rev0.1 | 166/347
4
3
TL3IE
EXEN3
R/W
R/W
0
0
CMT2380F17
2
1
TR3
C/T3
R/W
R/W
0
0
www.cmostek.com
0
CP/RL3
R/W
0

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the CMT2380F17 and is the answer not in the manual?

Questions and answers

Table of Contents