cPCI-DMXS64GX Technical Reference Manual
3.5.
CPCI I/O SIGNALS
This section describes integrated feature signals available on rear panel CPCI I/O
connectors (J3, J4, and J5)
3.5.1. J3 Signal Specification
3.5.1.1. Ethernet LEDS
Signal
Pin Assignation
SPEEDLED 0-1
A6, E6
LAN 0-1 LINK LED
B6, D6
LAN 0-1 ACT LED
C6, A7
3.5.1.2. Ethernet 1
Signal
Pin Assignation
LAN1:ETX+
A9
LAN1:ETX-
B9
LAN1:ERX+
C9
LAN1:ERX-
D9
Description
Speed LED signal
Link integrity LED signal
Transmit / receive activity LED signal
Description
Ethernet High Transmit Data line
Ethernet Low Transmit Data line
Ethernet High Receive Data line
Ethernet Low Receive Data line
3.30