U1
YNQ
Figure 7-1: AC7Z100 FPGA Core board LED light Hardware Connection
Part 8: Reset circuit
There is a reset circuit on the AC7Z100 core board. The reset input signal
is connected to the reset button on the carrier board. The reset output is
connected to the PS reset pin of the ZYNQ chip. The user can use the buttons
on the carrier board to reset the ZYNQ system. The schematic diagram of the
reset connection is shown in Figure 8-1:
ZYNQ
21 / 33
ZYNQ FPGA Development Board AC7Z100 User Manual
Z
BANK
0
PS_POR_B
BANK
500
Figure 8-1: Reset circuit connection diagram
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3.3V
D2
(DONE Indicator)
Reset Chip
(TCM811)
3.3V
3
.3V
(Power Indicator)
SYS_RESET
(Connect to carrier board)
D1
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