Part 4: Qspi Flash - Alinx AC7Z100 User Manual

PL_DDR3_DM2
PL_DDR3_DM3
PL_DDR3_A0
PL_DDR3_A1
PL_DDR3_A2
PL_DDR3_A3
PL_DDR3_A4
PL_DDR3_A5
PL_DDR3_A6
PL_DDR3_A7
PL_DDR3_A8
PL_DDR3_A9
PL_DDR3_A10
PL_DDR3_A11
PL_DDR3_A12
PL_DDR3_A13
PL_DDR3_A14
PL_DDR3_BA0
PL_DDR3_BA1
PL_DDR3_BA2
PL_DDR3_S0
PL_DDR3_RAS
PL_DDR3_CAS
PL_DDR3_WE
PL_DDR3_ODT
PL_DDR3_RESET
PL_DDR3_CLK0_P
PL_DDR3_CLK0_N
PL_DDR3_CKE

Part 4: QSPI Flash

The FPGA core board AC7Z100 is equipped with two 256MBit Quad-SPI
FLASH chips to form an 8-bit bandwidth data bus, the flash model is
14 / 33
ZYNQ FPGA Development Board AC7Z100 User Manual
IO_L13N_T2_MRCC_33
IO_L23N_T3_33
IO_L17N_T2_34
IO_L23P_T3_34
IO_L14P_T2_SRCC_34
IO_L15N_T2_DQS_34
IO_L10N_T1_34
IO_L17P_T2_34
IO_L11N_T1_SRCC_34
IO_L15P_T2_DQS_34
IO_L12N_T1_MRCC_34
IO_L18N_T2_34
IO_L24N_T3_34
IO_L11P_T1_SRCC_34
IO_L23N_T3_34
IO_L16P_T2_34
IO_L12P_T1_MRCC_34
IO_L18P_T2_34
IO_L19N_T3_VREF_34
IO_L22N_T3_34
IO_L14N_T2_SRCC_34
IO_L19P_T3_34
IO_L20N_T3_34
IO_L20P_T3_34
IO_L22P_T3_34
IO_L16N_T2_34
IO_L21P_T3_DQS_34
IO_L21N_T3_DQS_34
IO_L24P_T3_34
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F3
B1
H7
L8
H11
D10
H8
D11
L7
E10
L10
H12
G7
J9
H9
J11
K10
K11
K8
G11
F8
G9
E7
F7
J10
E11
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D6