Watkins-Johnson Company WJ-8718-19/FE Instruction Manual page 152

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Wd-BYio-is/rr. nr n t u t i v c n CIRCUIT DESCRIPTION
3.4.25.4 Multiplexers Ul and U2
Ul and U2 are three-port multiplexers. • Each port can pass 8 bits to the
output port. The ports are selected by two address bits driving the multiplexer.
Address 0 0 selects Port A; address 0 1 selects Port B; address 1 0 selects Port C.
Each multiplexer can read, that is transfer from any port to the output, or
it can write, that is transfer from the output to any port. The multiplexers are
selected by the CS inputs from decoder U7. When not selected by U7, the multiplexer
outputs are tri-stated to not interfered with other output ports on the bus.
3.4.26 FRONT PANEL SWITCH/ENCODER (MFP-A1) (796013-5)
The Front Panel Switch/Encoder is a P.W. Assembly that mounts two
subassemblies: Front Panel Switch Board, MFP-A1A1, and Front Panel Encoder Board,
MFP-A1A2. Refer to Figure 3-33, Front Panel Switch/Encoder Block Diagram, Figure
6-34, Front Panel Switch/Encoder Schematic Diagram, Figure 6-35, Front Panel Encoder
Board Schematic Diagram, and Figure 6-36, Front Panel Switch Board Schematic
Diagram, as aids in understanding the following descriptions.
3.4.26.1 Front Panel Encoder Board (MFP-A1A1) (796056-1)
The Front Panel Encoder Board consists of the following major circuit
areas:
o Address Latch, U18
o Address Decoder, U19
o Programmable Keyboard/Display Interface, U1,U2
o Switch Decoders, U11,U12
3.4.26.1.1 Address Latch, U18
U18 is an octal flip-flip used as an 8-bit latch. The D inputs are driven
from the address/data bus. The microprocessor outputs an address on the bus, followed
by bringing ALE low. This transfers the address to the U18 Q outputs.
3.4.26.1.2 Address Decoder, U19
U19 is a 3-to-8 line decoder. The address inputs of U19 are driven by the
Q outputs of U18 and bit A12. The Y outputs enable the following functions:
Y0 — Tune wheel encoder
Yl — Interface Ul
Y2 ~ Interface U2
Y3 — Audio Multiplexer Latch U20
Y4 — Tune Wheel Encoder
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