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WJ-8718-19/FE HF RECEIVER
CIRCUIT DESCRIPTION
Assume a BFO frequency of 460.4 kHz is needed.
This corresponds to a
thumb wheel selection of +5.4 kHz, and a VCO frequency of 4.604 MHz.
From the
thumbwheel selection, a "+" presets U3 with a 0000," a "5" presets U2 with a 0101, and
a "4" presets Ul with a 0100.
Therefore, counting from 0054 down to 5450 results in a
divide ratio of 4604.
With a divide ratio of 4604, the end-of-cycle detector will
produce a 1 kHz reset pulse output for an input frequency of 4.604 MHz.
The phase detector, U9A, receives a fixed 1 kHz frequency at its
reference input, pin 1, and a signal from the divider at its variable input, pin 3.
These two signals produce an output that characterizes their differences in frequency
and phase.
The charge pump, U9B receives this pulsed waveform from the phase
detector outputs and translates them to fixed positive and negative-going amplitude
levels (centered about 1.5 V).
These levels are filtered and integrated by the loop filter, Q4 and U9C, providing the
tuning voltage to lock the VCO at the correct frequency.
The VCO output drives buffer amplifier Q2.
Q2 and its surrounding
components form a tuned amplifier for the incoming VCO output frequency. This VCO
sine-wave frequency is then coupled to a sine-wave to TTL converter, Q3. From here,
the digital signal returns as the clock input of the programmable divider, and is
divided by 10 in U10 and provided as the BFO output signal.
3.4.21
SYNTHESIZER INTERFACE/MEMORY (A6A1) (794275)
The Synthesizer Interface/Memory mounts on the A6 Motherboard (see
paragraph 3.3.6).
The Synthesizer Interface/Memory interfaces the Digital Control
microprocessor with the LO and BFO synthesizers with data latches.
Refer to
Figure 3-28, Synthesizer Interface/Memory Block Diagram, as an aid in understanding
the following description.
Figure 6-29, Synthesizer Interface/Memory Schematic
Diagram, may be referred to for greater component level detail, if desired.
The
Synthesizer Interface/Memory consists of the following major circuit areas:
o
• Microprocessor
o
Bi-directional Bus Transceiver
o
Address Latch
o
Address Decoder
o
Memory
o
Frequency Registers
3.4.21.1
Microprocessor
The microprocessor, U18, is an 8-bit general purpose microprocessor.
It
contains eight addressable 8-bit general purpose registers and two 16-bit nonaddressable
registers
a multiplexed data bus allows the microprocessor to communicate with
external devices.
The address is divided between the high order bits address bus A8-
A15 and the low order address/data bus AD0-AD7.
The eight low order address bits
are latched into external devices by the ALE signal.
3-57
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