Watkins-Johnson Company WJ-8718-19/FE Instruction Manual page 135

CIRCUIT DESCRIPTION WJ-8718-19/FE HF RECEIVER
3.4.18.2.6 Time Base
The Time Base can be controlled internally with a 2 MHz temperature
compensated crystal oscillator, U14, and divide-by-2 frequency divider,U15A, or with a
1 MHz external source. Tri-state buffers controlled by rear panel INT/EXT switch
accomplish the switching of internal and external reference sources.
When operating with an external source of reference, the external select
(EXT SEL) line is grounded and the internal select (INT SEL) is pulled high by R84,
and the externally supplied 1 MHz reference is seen at module pin A17, EXT/INT STd!
The internal 1 MHz reference is inhibited when it reaches tri-state buffer U23B. The
external 1 MHz signal passes to transformer Tl. Tl and C23 resonate at 1 MHz while
the voltage divider of R34 and R35 shifts the 1 MHz signal to a 2.5 Vdc level. This
signal enters U16 which converts the sine wave to TTL levels. The output of U16
passes through tri-state buffer U23A and on to the rest of the Time Base circuits.
Operation with the internal source grounds the internal select (INT SEL)
line and allows the external select line to be pulled up by R85. Tri-state buffer U23
allows the 2 MHz signal that is divided to 1 MHz to be passed on to the rest of the
circuitry. The 1 MHz reference splits to two parts of the circuit. In one direction
the reference signal passes through U23C and out the EXT/INT STD connection. The
signal does continue to pass through U16 but is inhibited at U23A. In the other
direction, the reference signal passes to pin 3 of U23A (EXT) or pin 11 of U23B (INT)
and on to the rest of the time base circuitry.
For either source of reference, a 1 MHz TTL signal is present at the input
of Q6 and U15B. This signal is divided by 25, through U15B and U17, to become a
40 kHz reference for the 1st LO. The 1 MHz signal also passes through an isolation
amplifier Q6 to board pin A9 to be used as a reference for the 2nd LO. The 1 MHz
signal also passes through another isolation amplifier, Q7, to be divided down to three
more reference frequencies.
U18A and U19A form a divide-by-4 network whose input is 1 MHz and
whose output is 250 kHz. This 250 kHz divides down to 50 kHz through divider U19B
and is sent to U21B, the digital mixer of the 3rd LO. The output of U19B also enters
U18B, whose output is a 10 kHz signal. This signal leaves the board to be used as a
reference for the 2nd LO, and is divided to 5 kHz by U21A to act as a reference for
the 3rd LO circuit. The 10 kHz signal also passes through a divide-by-10 network
consisting of U20A and U20B, for an output reference signal of 1 kHz.
3.4.19 2ND LO SYNTHESIZER (A5A2) (791601)
The 2nd LO Synthesizer Assembly mounts on the A5 Motherboard (see
?o8Znfhi,3,5)D ,?he 2n». L° Syntnesizer ^nes in 100 Hz steps from 32.21000 MHz to
32 20001 MHz. Refer to Figure 3-26, 2nd LO Synthesizer Block Diagram, as an aid in
understanding the following description. Figure 6-26, 2nd LO Synthesizer Schematic
Diagram, may be referred to for greater component level detail, if desired. The 2nd
LO consists of three separate phase locked loops as follows:
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