Watkins-Johnson Company WJ-8718-19/FE Instruction Manual page 106

WJ-8718-19/FE HF RECEIVER CIRCUIT DESCRIPTION
3.4 CIRCUIT DESCRIPTIONS
This paragraph provides detailed circuit descriptions of the subassemblies
and modules contained in the WJ-8718-19-FE HF Receiver. All significant components
are identified and supplementary block diagrams are employed to aid in understanding
circuit operation.
3.4.1 RF FILTER (A2) (791616)
The RF Filter is a modular assembly which mounts one subassembly, Input
Filter A2A1.
3.4.1.1 Input Filter (A2A1) (280093)
Refer to Figure 6-1, Input Filter Schematic Diagram, as an aid in
understanding the following description. The Input Filter is a 15-pole, elliptic function
low-pass RF filter, with an insertion loss of less than 3.5 dB over normal input range
of 5 kHz to 30 MHz. Above 30 MHz, the attenuation increases rapidly. This
attenuation improves the image rejection and reduces the conducted LO leakage of the
receiver. Over the range of LO and image frequencies, the attenuation of the input
filter exceeds 80 dB. Resistor Rl provides a dc path to ground to bleed off any
accumulated static charge at the RF input. Diodes CR1 through CR4 use the Zener
breakdown potential to protect the rest of the receiver from input signals in excess of
+15 dBm. C12 and LI provide a high frequency trap to prevent radiation of harmonics
of the 1st LO. The nominal input impedance of the filter is 50 ohms.
3.4.2 1ST LO SYNTHESIZER (FE-A1A1A1) (370689)
The 1st LO Synthesizer mounts on the Frequency Extender, FE-Al,
Assembly (see paragraph 3.3.2). Figure 3-9 is a detailed block diagram of the 1st LO
Synthesizer which should be referred to in the following circuit description. Figure 6-
4, 1st LO Synthesizer Schematic Diagram, may be referred to for greater component
level detail, if desired.
Tuning data (D0-D6) from the Digital Control and the 1 MHz reference
signal drive the input to synthesizer chip Ul. The VCO sample (1st LO signal) from
FE-A1A1A2 is divided by 40/44 (dual modulus divider) and drives the Fin terminal of
Ul. Ul further divides the VCO signal (actual divide ratio determined by D0-D6) and
compares it with the 1 MHz reference. The OR and OV outputs from Ul are typically
short spikes (+5 V peak) when the error between VCO frequency and 1 MHz reference
is small (synthesizer loop locked).
The short spike outputs from Ul are integrated by U2 to give an average
dc level. The U2 output varies from +1 to +4 Vdc depending where in the tuning
range of 190 to 260 MHz the VCO is operating. U2 output goes through a sharp notch
filter to the tuning voltage input of the VCO, FE-A1A1A2.
Four bits of data (D0-D3) are latched through U7, then through U5 and
U6 to give three bits of bandswitch tuning data for the VCO. This organizes the VCO
tuning into 7 separate bands, each 10 MHz wide, as follows:
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