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18 INTERLEAVED PCM BUS OPERATION
In many architectures, the outputs of individual framers are combined into higher speed serial buses to
simplify transport across the system. The DS21354/554 can be configured to allow data and signaling
buses to be multiplexed into higher speed data and signaling buses eliminating external hardware saving
board space and cost.
The interleaved PCM bus option (IBO) supports two bus speeds. The 4.096 MHz bus speed allows two
SCTs to share a common bus. The 8.192 MHz bus speed allows four SCTs to share a common bus. See
Figure 18-1 for an example of 4 devices sharing a common 8.192MHz PCM bus. Each SCT that shares a
common bus must be configured through software and requires the use of one or two device pins. The
elastic stores of each SCT must be enabled and configured for 2.048 MHz operation. See Figure 18-1
and Table 18-1.
For all bus configurations, one SCT will be configured as the master device and the remaining SCTs will
be configured as slave devices. In the 4.096 MHz bus configuration there is one master and one slave. In
the 8.192 MHz bus configuration there is one master and three slaves. Refer to the IBO register
description for more detail.
IBO: INTERLEAVE BUS OPERATION REGISTER (Address = B5 Hex)
(MSB)
-
-
SYMBOL
POSITION NAME AND DESCRIPTION
-
IBO.6
-
IBO.6
-
IBO.5
-
IBO.4
IBOEN
IBO.3
INTSEL
IBO.2
MSEL0
IBO.1
MSEL1
IBO.0
IBO MASTER DEVICE SELECT Table 18-1
MSEL1
0
0
1
1
-
-
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Interleave Bus Operation Enable
0 = Interleave Bus Operation disabled.
1 = Interleave Bus Operation enabled.
Interleave Type Select
0 = Byte interleave.
1 = Frame interleave.
Master Device Bus Select Bit 0 See Table 18-1.
Master Device Bus Select Bit 1 See Table 18-1.
MSEL0
Function
0
Slave device.
1
Master device with 1 slave device (4.096 MHz bus rate)
0
Master device with 3 slave devices (8.192 MHz bus rate)
1
Reserved
IBOEN
INTSEL
86 of 117
DS21354 & DS21554
(LSB)
MSEL0
MSEL1
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