Hdlc Controller For The Sa Bits Or Ds0; General Overview - Dallas Semiconductor DS21354L Manual

E1 single chip transceivers;
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SYMBOL
POSITION NAME AND DESCRIPTION
SiNAF
TSaCR.6
RA
TSaCR.5
Sa4
TSaCR.4
Sa5
TSaCR.3
Sa6
TSaCR.2
Sa7
TSaCR.1
Sa8
TSaCR.0

15 HDLC CONTROLLER FOR THE Sa BITS OR DS0

The DS21354/554 has the ability to extract/insert data from/into the Sa bit positions (Sa4 to Sa8) or
from/to any multiple of DS0 or sub DS0 channels. The SCT contains a complete HDLC controller and
this operation is covered in Section 15.1.

15.1 General Overview

The DS21354/554 contains a complete HDLC controller with 64–byte buffers in both the transmit and
receive directions The HDLC controller performs all the necessary overhead for generating and receiving
an HDLC formatted message.
The HDLC controller automatically generates and detects flags, generates and checks the CRC check
sum, generates and detects abort sequences, stuffs and destuffs zeros (for transparency), and byte aligns
to the HDLC data stream.
There are eleven registers that the host will use to operate and control the operation of the HDLC
controller. A brief description of the registers is shown in Table 15.1.
International Bit in Non–Align Frame Insertion Control Bit.
0 = do not insert data from the TSiNAF register into the transmit data
stream
1 = insert data from the TSiNAF register into the transmit data stream
Remote Alarm Insertion Control Bit.
0 = do not insert data from the TRA register into the transmit data stream
1 = insert data from the TRA register into the transmit data stream
Additional Bit 4 Insertion Control Bit.
0 = do not insert data from the TSa4 register into the transmit data stream
1 = insert data from the TSa4 register into the transmit data stream
Additional Bit 5 Insertion Control Bit.
0 = do not insert data from the TSa5 register into the transmit data stream
1 = insert data from the TSa5 register into the transmit data stream
Additional Bit 6 Insertion Control Bit.
0 = do not insert data from the TSa6 register into the transmit data stream
1 = insert data from the TSa6 register into the transmit data stream
Additional Bit 7 Insertion Control Bit.
0 = do not insert data from the TSa7 register into the transmit data stream
1 = insert data from the TSa7 register into the transmit data stream
Additional Bit 8 Insertion Control Bit.
0 = do not insert data from the TSa8 register into the transmit data stream
1 = insert data from the TSa8 register into the transmit data stream
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DS21354 & DS21554

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