Signaling Operation; Processor Based Signaling - Dallas Semiconductor DS21354L Manual

CCR5: COMMON CONTROL REGISTER 5 (Address=AA Hex)
[Repeated here from section 6 for convenience]
(MSB)
LIRST RESALGN
SYMBOL POSITION NAME AND DESCRIPTION
LIRST CCR5.7
RESALGN CCR5.6
TESALGN CCR5.5
RCM4 CCR5.4
RCM3 CCR5.3
RCM2 CCR5.2
RCM1 CCR5.1
RCM0 CCR5.0
RDS0M: RECEIVE DS0 MONITOR REGISTER (Address=AB Hex)
(MSB)
B1 B2
SYMBOL POSITION NAME AND DESCRIPTION
B1 RDS0M.7
B2 RDS0M.6
B3 RDS0M.5
B4 RDS0M.4
B5 RDS0M.3
B6 RDS0M.2
B7 RDS0M.1
B8 RDS0M.0

10 SIGNALING OPERATION

The DS21354/554 contains provisions for both processor based (i.e., software based) signaling bit access
and for hardware based access. Both the processor based access and the hardware based access can be
used simultaneously if necessary. The processor based signaling is covered in Section 10.1 and the
hardware based signaling is covered in Section 10.2. When referring to signaling, the Voice Channel
numbering scheme is used.

10.1 Processor Based Signaling

The Channel Associated Signaling (CAS) bits embedded in the E1 stream can be extracted from the
receive stream and inserted into the transmit stream by the framer. Each of the 30 voice channels has four
signaling bits (A/B/C/D) associated with it. The numbers in parenthesis () are the voice channel
associated with a particular signaling bit. The voice channel numbers have been assigned as described in
the ITU documents. Please note that this is different than the channel numbering scheme (1 to 32) that is
used in the rest of the data sheet.
TESALGN RCM4
Line Interface Reset.
Receive Elastic Store Align.
Transmit Elastic Store Align.
Receive Channel Monitor Bit 4. MSB of a channel decode that deter-
mines which receive channel data will appear in the RDS0M register. See
Section 9 for details.
Receive Channel Monitor Bit 3.
Receive Channel Monitor Bit 2.
Receive Channel Monitor Bit 1.
Receive Channel Monitor Bit 0. LSB of the channel decode.
B3 B4
Receive DS0 Channel Bit 1. MSB of the DS0 channel (first bit received).
Receive DS0 Channel Bit 2.
Receive DS0 Channel Bit 3.
Receive DS0 Channel Bit 4.
Receive DS0 Channel Bit 5.
Receive DS0 Channel Bit 6.
Receive DS0 Channel Bit 7.
Receive DS0 Channel Bit 8. LSB of the DS0 channel (last bit received).
48 of 117
RCM3 RCM2
B5 B6
DS21354 & DS21554
(LSB)
RCM1 RCM0
(LSB)
B7 B8