Connection Diagrams; Connection Diagram Of R0E521000Epb00 - Renesas R0E521000EPB00 User Manual

R0E521000EPB00 User's Manual

4.3 Connection Diagrams

4.3.1 Connection diagram of R0E521000EPB00

Figure 4.1 shows the part of the connection diagram of the R0E521000EPB00. This connection diagram mainly shows the
interface section. The circuits not connected to the user system such as the emulator's control system are omitted. The signals
not shown in Figure 4.1 connect the evaluation MCU and the user system directly. Table 4.2 shows IC electric characteristics
of this product for reference purposes.
IC8
P00--P07,P10--P17
P20--P27,P30--P37
P45,P50--P57,P60--P67
AVCC,AVSS,VREF
R8C/Tiny
Evaluation Chip
Figure 4.1 Connection diagram of R0E521000EPB00 (partly)
Table 4.2 Electrical characteristics of 74HC4066
Symbol
R ON resistor
ON
ΔR
ON resistor difference
ON
I Leak current (Off)
OFF
I Leak current (On, output: open)
IN
REJ10J0844-0400 Rev.4.00 October 16, 2007
Page 69 of 88
VDD2_VCC
VCC
P43
*
P44
P46
*
P47
*
*
VDD2
(internal power supply generating circuit )
*
VSS
*: Connected to the inside of the emulator.
Condition
Item
VCC
4.5
4.5
12.0
12.0
VDD2_VCC
74S1053
VDD2_VCC
*
74HC4066
74S1053
VDD2_VCC
74HC4066
74S1053
VDD2_VCC
*
74HC4066
74S1053
VDD2_VCC
74HC4066
74S1053
VDD2_VCC
JP2
INT
VDD2_VCC
JP1
EXT
Standard values
Min. Standard
- 96
- 10
- -
- -
4. Hardware Specifications
P00--P07
P10--P17
P20--P27
P30--P37
P45
P50--P57
P60--P67
AVCC,AVSS,VREF
P43
P44
P46
P47
MODE
RESET#
VCC
VSS
Unit
Max.
200
Ω
-
±1
µA
±1