Renesas R0E521000EPB00 User Manual page 68

R0E521000EPB00 User's Manual
Note on A/D Converter Function:
Because a converter board and other devices are used between the evaluation MCU and the user system, the
A/D converter operates differently from that of an actual MCU.
Notes on Stack Area:
With this product, the interrupt stack pointer (ISP) is set at 00500h and used as a stack area after a reset is
released.
With this product, a maximum 8 bytes of the interrupt stack is consumed as a work area. Therefore, ensure the
+8 byte maximum capacity used by the user program as the interrupt stack area.
Even if the interrupt stack does not have an enough area, do not access areas which cannot be used as a stack
(SFR area, RAM area which stores data, or ROM area) as a work area. Accessing these areas like this is a cause
of user program crashes and destabilized emulator control.
Note on Accessing Addresses 00000h and 00001h:
With the R8C/Tiny Series MCUs, when a maskable interrupt is generated, the interrupt data (interrupt number
and interrupt request level) stored in addresses 00000h and 00001h is read out. Also, the interrupt request bit is
cleared when address 00000h or 00001h is read out. Consequently, when the address 00000h or 00001h readout
instruction is executed or when address 00000h or 00001h is read out in the cause of a program runaway, a
malfunction occurs in that the interrupt is not executed despite the interrupt request, because the request bit of
the highest priority interrupt factor enabled is cleared.
With this product, when the reading out to the addresses 00000h or 00001h is generated excluding the interrupt,
the yellow LED lights up to alarm. When this LED lights, there is a possibility of wrong access to addresses
00000h and 00001h, therefore check the program.
Note on Watchdog Timer:
Although this product emulates the watchdog timer function of the target MCU, note that the count value does
not always match that of the actual MCU. For this reason, when the program is single-stepped successively as in
the case of overstep operation, a watchdog timer interrupt may be generated.
Note on the block 0 rewrite disabled bit (FMR15) and block 1 rewrite disabled bit (FMR16):
The functions associated with bit 5 (FMR15) and bit 6 (FMR16) of Flash Memory Control Register 1 (FMR1 at
address 001B5h) cannot be used. When writing to FMR15 and FMR16, always be sure to write a 0. These bits
read as 0 when read out.
Note on Final Evaluation:
Be sure to evaluate your system and make final confirmation with an actual MCU.
REJ10J0844-0400 Rev.4.00 October 16, 2007
Page 68 of 88
IMPORTANT
4. Hardware Specifications