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R0E3308B0EPB00 User's Manual
4.3 Connection Diagrams
Figures 4.1 and 4.2 show the connection diagrams of the R0E3308B0EPB00. These connection diagrams mainly show the
interface section. The signals not shown in Figures 4.1 and 4.2 connect the evaluation MCU and the user system directly. The
circuits not connected to the user system such as the emulator's control system are omitted in Figures 4.1 and 4.2. Table 4.2
shows IC electric characteristics of this product for reference purposes.
Figure 4.1 Connection diagram of the R0E3308B0EPB00 (1/2)
R20UT0210EJ0200 Rev.2.00
Sep 16, 2010
IC15
143
AVcc
140
AVss
C3
142
Vref
CPU Emulate
MCU
17
Xcin
18
Xcout
IC1
17
P87/Xcin/Vcont
18
P86/Xcout
I/O Emulate MCU
143
AVcc
140
AVss
C1
142
Vref
R18
100
24
P85/NMI*
*
20
XOUT
NC
*
*
*
*
*
*
Vcc
C4
GND
Vcc
Vref
JP1
XCIN
*
SW2
XCIN
*
P87
P87/Xcin/Vcont
NC
NC
SW3
NC
P86
P86/Xcout
Vcc
AVcc
SW1
AVcc
C2
AVss
AVss
GND
Vref
Vcc
R17
100k
P85/NMI*
SW4
XOUT
XOUT
NC
NC
NC
Vcc
R14
100k
RESET*
Vcc
R16
100k
P55/RDY*
Vcc
R15
100k
P57/HOLD*
XIN
CNVss
BYTE
*:
Connected to the inside of the emulator
4. Hardware Specifications
Page 78 of 98
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