R0E521000EPB00 User's Manual
4) Trace window (Bus information display)
5) Trace window (Disassemble display)
6) Trace window (Source display)
7) Trace window (Data access display)
REJ10J0844-0400 Rev.4.00 October 16, 2007
Page 61 of 88
3. Usage (Emulator Debugger)
Explanation
of
the
trace
information display)
The following explains the displayed contents, from left to
right.
- Address
Shows the status of the address bus.
- Data
Shows the status of the data bus.
- BUS
Shows the width of the internal data bus. For the R8C/Tiny
series, only "8b" for 8 bits bus wide bus is displayed,
excluding a part of the SFR area (00126h to 0012Fh,
00146h to 0014Fh and 00156h to 0015Fh)
- BHE
Shows the status (0 or 1) of the BHE (Byte High Enable)
signal. If this signal = 0, the odd-address data is valid.
- BIU
Shows the status between the BIU (Bus Interface Unit) and
memory or I/O.
Symbol Status
-
: No change (non-active)
DMA
: Data access except for CPU
With this product, "DMA" is displayed in a
cycle in which an emulator-only data access is
performed.
INT
: Interrupt acknowledge cycle
IB
: Instruction code read (bytes) by CPU
DB
: Data access (bytes) by CPU
IW
: Instruction code read (words) by CPU
DW
: Data access (words) by CPU
- R/W
Shows the status of the data bus. Displayed as "R" for
Read, "W" for Write, and "-" for no access.
- RWT
This is the signal to indicate a valid bus cycle. When valid,
RWT = 0. The Address, Data, and the BIU signals are
effective when this signal is 0.
- CPU
Shows the status between the CPU and BIU (Bus Interface
Unit).
Symbol
Status
-
: Non-active
CB
: Op-code read (bytes)
RB
: Operand read (bytes)
QC
: Clears instruction queue buffer
CW
: Op-code read (words)
RW
: Operand read (words)
- QN
Shows the byte count stored in the instruction queue buffer.
The display range is 0 to 4.
- 76543210
Shows the level of external trace signal input cable
EXTIN0 to EXTIN7.
- h" m' s: ms. us
Shows the elapsed time after starting the user program.
window
(bus