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R0E521000EPB00 User's Manual
Notes on Clock Supply to an MCU:
A clock supplied to the evaluation MCU is selected by the Emulator tab in the Init dialog box of the emulator
debugger.
(1) When "Internal" is selected (main and sub clocks):
The clock generated by the oscillation circuit in the PC7501 is supplied to the evaluation MCU. The clock
is continually supplied to the evaluation MCU regardless of a state of user system clock and a state of user
program execution.
(2) When "External" is selected (main and sub clocks):
The clock oscillating on the user system is supplied to the evaluation MCU. Clock supply to the evaluation
MCU depends on an oscillation state (oscillate/off) of the user system.
(3) When "Generate" is selected (main clock):
A clock generated by the dedicated circuit in the PC7501 is supplied to the evaluation MCU. The clock is
continually supplied to the evaluation MCU regardless of a state of user system clock and a state of user
program execution.
Note on Stop and Wait Mode:
Do not single-step an instruction shifting to stop or wait mode. It may cause communications errors.
Notes on Software Break:
A software break generates a break interruption by forcibly inserting a BRK instruction "00h" instead of an
instruction code. Therefore, when referencing the result of a trace in bus mode, "00h" is displayed for the
instruction fetch address where a software break is set.
As the BRK instruction is used for the emulator, do not use it in a user program.
Note on the Watchdog Timer:
If the reset circuit of the user system has a watchdog timer, disable it when using the emulator.
Notes on Address-Match Interrupt:
Do not set a software break at the address for which an address-match interrupt will be generated, because it
will cause the user program to run out of control. Make sure software and hardware breaks are set at the
beginning of the address-match interrupt processing.
If the address for which an address-match interrupt will be generated is single-stepped, the user program is
halted when the address-match interrupt processing is executed and the first instruction after return from the
interrupt is executed.
Note on Protect Resistor:
The protect is not canceled when bit 2 of protect register PRCR (PRC2), which enables writing into the port P0
direction register, is changed with the below procedure.
(1) Single step execution of an instruction setting PRC2 to "1"
(2) Execution from the instruction setting "1" to PRC2 where a software breakpoint is set
(3) Setting a break point between an instruction setting PRC2 to "1" and a point where the port P0 direction
register is set
(4) Setting PRC2 to "1" by the memory window or script window
Note on Debugging Operations after Releasing a Reset form the User System:
Do not execute debugging operations (such as stopping the user program execution by a software or hardware
break, run-time debugging) after releasing a reset on the user system until an interrupt stack pointer (ISP) is set
in the user program.
REJ10J0844-0400 Rev.4.00 October 16, 2007
Page 78 of 88
IMPORTANT
4. Hardware Specifications
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