Programmable Configuration Data
Table A-6
Value
99 (0x63)
:
127 (0x7F)
NOTES:
1. This will typically be programmed as 128 bytes.
2. This will typically be programmed as 256 bytes.
3. From data sheet.
4. High order bit is self-refresh flag. If set to 1, the assembly supports self refresh.
5. Reserved.
Table A-7
Offset
00 (0x00)
01 (0x01)
02 (0x02)
03 (0x03)
04 (0x04)
05 (0x05)
06 (0x06)
07 (0x07)
08 (0x08)
78
Static SPD Contents (continued)
Offset
Description
00
Manufacturer's Specific Data.
Refer to Note
:
00
Variable SPD Contents
Value
Description
80
Number of Serial PD Bytes written during module production: 0x80 =
128 bytes.
Refer to Note
08
Total Number of Bytes in Serial PD Device: 0x08 = 256 bytes.
Refer to Note
08
Fundamental Memory Type (FPM, EDO, SDRAM): 0x08 = DDR2
SDRAM
0E
Number of Row Addresses on this assembly: 0x0E = A0-A13
0A
Number of Column Addresses on this assembly: 0x0A = A0-A9
00
Number of DIMM Banks: 0x00 = one bank
48
Data Width of this assembly: 0x48 = 72 bits
00
Reserved
05
Voltage Interface Level of this assembly: 0x05 = SSTL 1.8 V
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
Programmable Configuration Data
5
.
1
.
2
.
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