3.1.18 Watch Dog Timer Resolution Register; Table 3-19 Watch Dog Timer Count Register - SMART Embedded Computing MVME7100 Programmer's Reference Manual

Register Descriptions

3.1.18 Watch Dog Timer Resolution Register

The MVME7100 provides a watch dog timer resolution register.
Table 3-19
REG
BIT
Field
OPER
RESET
RES
RSVD
36
Watch Dog Timer count Register
Watch Dog Timer Resolution Register - 0xF200 0025
7 6 5
RSVD RSVD RSVD
R
0 0 0
Resolution. These bits define the resolution of the counter.
2 s
0:
4 s
1:
8 s
2:
16 s
3:
32 s
4:
64 s
5:
128 s
6:
256 s
7:
512 s
8:
1 s (default)
9:
2 s
10:
4 s
11:
8 s
12:
16 s
13:
32 s
14:
64 s
15:
Reserved for future implementation.
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
4 3 2
RSVD RES
R/W
0 9
Register Descriptions
1 0