Programming Details
Table 4-12
Device
PEX8114
PEX8112
MC864xD
MC864xD
XMCspan
4.13.1
System Clock
The system clock is driven by an oscillator. The following table defines the clock
frequencies for various configurations.
Table 4-13
SYSCLK
66.67MHz
66.67MHz
4.13.2
Real Time Clock Input
The RTC clock input is driven by 1MHz clock generated by the Control and Timers PLD.
This provides a fixed clock reference for the MC864xD PIC timers which software can use
as a known timing reference.
4.13.3
Local Bus Controller Clock Divisor
The Local Bus Controller (LBC) clock output is connected to the PLD but is not used by the
internal logic.
58
Clock Assignments (continued)
Clock Signals
CLK_PCIE3
CLK_PCIE4
CLK_PCIE5
CLK_PCIE6
CLK_PCIE7
Clock Frequencies
Core
1.3GHz
1.067GHz
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
Frequency
Clock Tree
(MHz)
Source
100
ICS9FG108
100
ICS9FG108
100
ICS9FG108
100
ICS9FG108
100
ICS9FG108
MXP (Platform)
533MHz
533MHz
Programming Details
Qty
VIO
1
DIFF
1
DIFF
1
DIFF
1
DIFF
1
DIFF
DDR2
266MHz
266MHz
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