System Status Register - SMART Embedded Computing MVME7100 Programmer's Reference Manual

Register Descriptions
NOTES:
1. Reserved for future implementation.
2. 32-bit write only.
3. Byte read/write capable.
3.1.1

System Status Register

The MVME7100 has a System Status Register that is a read only register used to provide general
board status information.
Table 3-2
REG
BIT
Field
OPER
RESET
BD_TYPE
PEX8525ERROR
SAFE_START
Core 1 OFFSET
24
System Status Register
System Status Register - 0xF200 0000
7 6
SW8 MASTER
WP
R
X X
Board Type. These bits indicate the board type.
00: VME SBC
01: PrPMC
10-11: reserved
PEX8525 Fatal Error. This bit reflects the Fatal Error signal from
the PEX8525. A set condition indicates the error signal is active.
ENV Safe Start. This bit reflects the current state of the ENV safe
start select switch. A cleared condition indicates that the ENV
settings programmed in NVRAM should be used by the firmware.
A set condition indicates that firmware should use the safe ENV
settings.
Core 1 Low Memory Offset. This bit reflects the current state of
Core 1 Low Memory Offset switch. A cleared condition indicates
the switch is off. A set condition indicates the switch is on. When
this switch is on, real address A in the range of 0 to 256MBytes-1
is translated to address A +256MBytes. When this switch is off,
the address is not translated.
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
5 4
PMC 133 Core 1
OFFSET
X X
Register Descriptions
3 2 1
SAFE_S PEX BD_TYPE
TART
8525
ERROR
X 0 0
0
0