Pld Date Code Register; Test Register 1; Table 3-22 Pld Date Code Register - SMART Embedded Computing MVME7100 Programmer's Reference Manual

Register Descriptions
3.1.21

PLD Date Code Register

The MVME7100 PLD provides a 32-bit register which contains the build date code of the
inters/registers PLD.
Table 3-22
REG
BIT
Field
OPER
RESET
yy
mm
dd
vv

3.1.22 Test Register 1

The MVME7100 provides a 32-bit general purpose read/write register which can be used
by software for PLD test or general status bit storage.
Table 3-23 Test Register 1
REG
BIT
Field
OPER
RESET
TEST1
38
PLD Date Code Register
Test Register 1 - 0xF200 0034
31:24 23:16
yy mm
R
xxxx
Last two digits of year
Month
Day
Version of the day
General purpose 32-bit R/W field.
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
15:8
dd
Test Register 1 - 0xF200 0038
31:0
TEST1
R/W
0000
Register Descriptions
7:0
vv