Nand Flash Chip 2 Control Register; Nand Flash Chip 2 Select Register - SMART Embedded Computing MVME7100 Programmer's Reference Manual

3.1.12

NAND Flash Chip 2 Control Register

The MVME7100 provides a Control Register for the NAND flash device.
Table 3-13
REG
BIT
Field
OPER
RESET
WP
ALE
CLE
RSVD
3.1.13

NAND Flash Chip 2 Select Register

The MVME7100 provides a Select Register for the NAND flash device.
Table 3-14
REG
BIT
Field
OPER
RESET
CE4
CE3
CE2
MVME7100 Single Board Computer Programmer's Reference (6806800E82C)
NAND Flash Chip 2 Control Register
NAND Flash Chip 2 Control Register - 0xF200 0018
7 6 5
CLE ALE WP
R/W
0 0 1
Write Protect. If cleared, WP is not asserted when the device is accessed.
If set, WP is asserted when the device is accessed.
Address Latch Enable. If cleared, ALE is not asserted when the device is
accessed. If set, ALE is asserted when the device is accessed.
Command Latch Enable. If cleared, CLE is not asserted when the device
is accessed. If set, CLE is asserted when the device is accessed.
Reserved for future implementation.
NAND Flash Chip 2 Select Register
NAND Flash Chip 2 Select Register - 0xF200 0019
7 6 5
CE1 CE2 CE3
R/W
0 0 0
Chip Enable 4. If cleared, CE4 is not asserted when the device is accessed.
If set, CE4 is asserted when the device is accessed.
Chip Enable 3. If cleared, CE3 is not asserted when the device is accessed.
If set, CE3 is asserted when the device is accessed.
Chip Enable 2. If cleared, CE2 is not asserted when the device is accessed.
If set, CE2 is asserted when the device is accessed.
Register Descriptions
4 3 2
RSVD RSVD RSVD
R
0 0 0
4 3 2
CE4 RSVD RSVD
R
0 0 0
1 0
RSVD RSVD
0 0
1 0
RSVD RSVD
0 0
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