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On-Chip Peripheral Components
Figures 7-41 and 7-42 show functional diagrams of the capture function of timer 2. Figure 7-41
illustrates the operation of the CRC register, while figure 7-42 shows the operation of the compare/
capture registers 1 to 3.
The two capture modes can be established individually for each capture register by bits in SFR
CCEN (compare/capture enable register). That means, in contrast to the compare modes, it is
possible to simultaneously select mode 0 for one capture register and mode 1 for another register.
The bit positions and functions of CCEN are listed in figure 7-40.
*
Figure 7-41
Capture with Register CRC
Semiconductor Group
97
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