Figure 7-46
Special Function Register IEN1
0BF H
0B8 H
EXEN2 SWDT
These bits are not used by the watchdog timer.
Bit
SWDT
Figure 7-47
Special Function Register IP0
0A9 H
–
These bits are not used by the watchdog timer.
Bit
WDTS
Semiconductor Group
0BE H
0BD H
0BC H
EX6
EX5
Function
Watchdog timer start/refresh flag.
Set to activate/refresh the watchdog timer. When directly set after setting
WDT, a watchdog timer refresh is performed. Bit SWDT is reset by
hardware two processor cycles after it has been set.
WDTS
IP0.5
IP0.4
Function
Watchdog timer status flag.
Set by hardware when the watchdog timer was started.
Can be read by software.
On-Chip Peripheral Components
0BB H
0BA H
0B9 H
EX4
EX3
EX2
IP0.3
IP0.2
IP0.1
*
106
0B8 H
EADC
IEN1
IP0.0
IP0