Siemens SAB 80515 Series User Manual page 87

Figure 7-34
Special Function Register T2CON
0CF H
0C8 H T2PS
These bits are not used in combination with timer 2.
Timer 2 control register. Bit-addressable register which controls timer 2 function and compare mode
of registers CRC, CC1 to CC3.
Bit
T2I1 T2I0
0 0
0 1
1 0
1 1
T2R1 T2R0
0 X
1 0
1 1
T2CM
I3FR
T2PS
Semiconductor Group
0CE H 0CD H 0CC H
I3FR I2FR T2R1
Symbol
Timer 2 input selection
No input selected, timer 2 stops
Timer function
input frequency =
Counter function, external input signal at pin T2/P1.7
Gated timer function, input controlled by pin T2/P1.7
Timer 2 reload mode selection
Reload disabled
Mode 0: auto-reload upon timer 2 overflow (TF2)
Mode 1: reload upon falling edge at pin T2EX/P1.5
Compare mode bit for registers CRC, CC1 through CC3. When set,
compare mode 1 is selected. T2CM = 0 selects compare mode 0.
External interrupt 3 falling/rising edge flag, also used for capture function
in combination with register CRC (see section 7.5.3).
If set, capture to register to CRC (if enabled) will occur on a positive
transition at pin P1.0/INT3/CC0. If I3FR is cleared, capture will occur on
a negative transition.
Prescaler select bit. When set, timer 2 is clocked in the "timer" or "gated
timer" function with 1/24 of the oscillator frequency.
T2PS = 0 gates f
OSC
operation of timer 2.
On-Chip Peripheral Components
0CB H 0CA H
T2R0 T2CM
f
/12 (T2PS = 0) or
OSC
*
/12 to timer 2. T2PS must be 0 for the counter
87
0C9 H 0C8 H
T2I1 T2I0 T2CON
f
/24 (T2PS = 1)
OSC