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In all four modes, transmission is initiated by any instruction that uses SBUF as a destination
register. Reception is initiated in mode 0 by the condition RI = 0 and REN = 1. Reception is initiated
in the other modes by the incoming start bit if REN = 1. The serial interfaces also provide interrupt
requests when a transmission or a reception of a frame has completed. The corresponding interrupt
request flags for serial interface are TI or RI, resp. See section 8 for more details about the interrupt
structure. The interrupt request flags TI and RI can also be used for polling the serial interface if the
serial interrupt is not to be used (i.e. serial interrupt not enabled).
The control and status bits of the serial channel 0 in special function register S0CON are illustrated
in figure 7-8. Figure 7-7 shows the special function register S0BUF which is the data register for
receive and transmit. The following table summarizes the operating modes of serial interface 0.
Figure 7-7
Special Function Register SCON (Address 98 H )
9F H
98 H
SM0
Bit
SM0
SM1
0
0
0
1
1
0
1
1
SM2
REN
TB8
RB8
TI
RI
Semiconductor Group
9E H
9D H
9C H
SM1
SM2
REN
Symbol
Serial mode 0:
Serial mode 1:
Serial mode 2:
Serial mode 3:
Enables the multiprocessor communication feature in modes 2 and 3. In
mode 2 or 3 and SM2 being set to 1, RI will not be activated if the
received 9th data bit (RB8) is 0. In mode 1 and SM2 = 1, RI will not be
activated if a valid stop bit has not been received. In mode 0, SM2 should
be 0.
Receiver enable. Enables serial reception. Set by software to enable
reception. Cleared by software to disable reception.
Transmitter bit 8. Is the 9th data bit that will be transmitted in modes 2
and 3. Set or cleared by software as desired.
Receiver bit 8. In modes 2 and 3 it is the 9th bit that was received. In
mode 1, if SM2 = 0, RB8 is the stop bit that was received. In mode 0,
RB8 is not used.
Transmitter interrupt. Is the transmit interrupt flag. Set by hardware at
the end of the 8th bit time in mode 0, or at the beginning of the stop bit
in the other modes, in any serial transmission. Must by cleared by
software.
Receiver interrupt. Is the receive interrupt flag. Set by hardware at the
end of the 8th bit time in mode 0, or during the stop bit time in the other
modes, in any serial reception. Must be cleared by software.
On-Chip Peripheral Components
9B H
9A H
TB8
RB8
*
Shift register mode, fixed baud rate
8-bit UART, variable baud rate
9-bit UART, fixed baud rate
9-bit UART, variable baud rate
48
99 H
98 H
TI
RI
SCON
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