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Address Space
Lower 128 bytes of RAM
Upper 128 bytes of RAM
Special function registers
For details about the addressing modes see chapter 9.1.
Figure 4-1
Program Memory Address Space
The lower 128 bytes of the internal RAM are again grouped in three address spaces
(see figure 4-3):
1)
A general purpose register area occupies locations 0 through 1F H (see also section 4.3).
2)
The next 16 bytes, location 20 H through 2F H , contain 128 directly addressable bits.
Programming information: These bits can be referred to in two ways, both of which are
acceptable for the ASM51. One way is to refer to their bit addresses, i.e. 0 to 7F H . The other
way is by referencing to bytes 20 H to 2F H . Thus bits 0 to 7 can also be referred to as bits 20.0
to 20.7, and bits 08 H and 0F H are the same as 21.0 to 21.7 and so on. Each of the 16 bytes in
this segment may also be addressed as a byte.)
3)
Locations 30 H to 7F H can be used as a scratch pad area.
Semiconductor Group
Locations
00 H to 7F H
80 H to 0FF H
80 H to 0FF H
*
20
Memory Organization
Addressing Mode
direct/indirect
indirect
direct
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