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Figure 8-6
Special Function Register IRCON (Address 0C0 H )
0C7 H
0C0 H
EXF2
Bit
Function
IADC
A/D converter interrupt request flag. Set by hardware at the end of a conversion.
Must be cleared by software.
IEX2
External interrupt 2 edge flag. Set by hardware when external interrupt edge was
detected or when a compare event occurred at pin 1.4/INT2/CC4. Cleared when
interrupt processed.
IEX3
External interrupt 3 edge flag. Set by hardware when external interrupt edge was
detected or when a compare event occurred at pin 1.0/INT3/CC0. Cleared when
interrupt processed.
IEX4
External interrupt 4 edge flag. Set by hardware when external interrupt edge was
detected or when a compare event occurred at pin 1.1/INT4/CC1. Cleared when
interrupt processed.
IEX5
External interrupt 5 edge flag. Set by hardware when external interrupt edge was
detected or when a compare event occurred at pin 1.2/INT5/CC2. Cleared when
interrupt processed.
IEX6
External interrupt 6 edge flag. Set by hardware when external interrupt edge was
detected or when a compare event occurred at pin 1.3/INT6/CC3. Cleared when
interrupt processed.
TF2
Timer 2 overflow flag. Set by timer 2 overflow. Must be cleared by software. If the
timer 2 interrupt is enabled, TF2 = 1 will cause an interrupt.
EXF2
Timer 2 external reload flag. Set when a reload is caused by a negative transition
on pin T2EX while EXEN2 = 1. When the timer 2 interrupt is enabled, EXF2 = 1
will cause the CPU to vector the timer 2 interrupt routine. Can be used as an
additional external interrupt when the reload function is not used. EXF2 must be
cleared by software.
Semiconductor Group
0C6 H
0C5 H
0C4 H
TF2
IEX6
IEX5
0C3 H
0C2 H
0C1 H
IEX4
IEX3
*
119
Interrupt System
0C0 H
IEX2
IADC
IRCON
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