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AC Characteristics (cont'd)
Parameter
External Data Memory Characteristics
RDpulse width
WR pulse width
Address hold after ALE
RD to valid data in
Data hold after RD
Data float after RD
ALE to valid data in
Address to valid data in
ALE to WR or RD
WR or RD high to ALE
high
Address valid to WR
Data valid to WR transi-
tion
Data setup before WR
Data hold after WR
Address float after RD
Semiconductor Group
Symbol
16 MHz clock
min.
275
–
t
RLRH
275
–
t
WLWH
90
–
t
LLAX2
–
148
t
RLDV
0
–
t
RHDX
–
55
t
RHDZ
*
t
–
350
LLDV
t
–
398
AVDV
t
138
238
LLWL
t
23
103
WHLH
120
–
t
AVWL
13
–
t
QVWX
t
288
–
QVWH
t
13
–
WHQX
t
–
0
RLAZ
258
Device Specifications
Limit values
Variable clock
1/t
= 3.5 MHz to 16 MHz
CLCL
max.
min.
6 t
– 100
CLCL
6 t
– 100
CLCL
2 t
– 35
CLCL
–
0
–
–
–
3 t
– 50
CLCL
t
– 40
CLCL
4 t
– 130
CLCL
– 50
t
CLCL
7 t
– 150
CLCL
t
– 50
CLCL
–
Unit
max.
–
ns
–
ns
–
ns
5 t
– 165
ns
CLCL
–
ns
2 t
– 70
ns
CLCL
8t
– 150
ns
CLCL
9 t
– 165
ns
CLCL
3 t
+ 50
ns
CLCL
t
+ 40
ns
CLCL
–
ns
–
ns
–
ns
–
ns
0
ns
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