Table Of Contents - Xilinx Zynq UltraScale+ ZCU216 User Manual

Table of Contents

Table Of Contents2
Revision History4
Overview5
Block Diagram5
Chapter 1: Introduction5
Document Audience And Scope5
Additional Resources5
Zcu216 Evaluation Board Block Diagram6
Board Features6
Zynq Ultrascale+ Rfsoc Zu49Dr Features And Resources9
Board Specifications10
Dimensions10
Environmental10
Operating Voltage10
Standard Esd Measures11
Board Component Location11
Chapter 2: Board Setup And Configuration11
Zcu216 Component Locations13
Board Component Descriptions14
Zcu216 Board Component Locations14
Default Jumper And Switch Settings16
Board Jumper Header And Switch Locations17
Jumpers17
Default Jumper Settings18
Switches19
Default Switch Settings19
Zynq Ultrascale+ Rfsoc Xczu49Dr Configuration20
Mode Switch Sw2 Configuration Option Settings20
Jtag20
Qspi20
Sd21
Component Descriptions22
Zynq Ultrascale+ Rfsoc Xczu49Dr22
Chapter 3: Board Component Descriptions22
Top-Level Block Diagram23
Zynq Ultrascale+ Rfsoc Top-Level Block Diagram23
Encryption Key Battery Backup Circuit24
I/O Voltage Rails25
Ps Ddr4 Sodimm Socket26
Pl C0 I/F Ddr4 Component Memory27
Pl C1 I/F Ddr4 Component Memory27
Psmio28
Mio Peripheral Mapping28
Quad-Spi Flash Memory (Mio 0–12)29
Gpio (Mio 13, 38)30
I2C Bus Topology Overview30
I2C0 (Mio 14-15), I2C1 (Mio 16-17)30
I2C0 (Mio 14-15)31
I2C0 And I2C1 Bus Connectivity Overview31
I2C0 Bus Topology32
I2C0 Port Expander Tca6416A U15 Connections32
I2C1 (Mio 16-17)33
I2C0 Multiplexer Pca9544A U17 Target Device Addresses33
I2C1 Bus Topology34
I2C1 Tca9548A U20 Target Device Addresses34
I2C1 Tca9548A U22 Target Device Addresses35
Uart0 (Mio 18-19)35
Ft4232Hl Port Assignments35
Zcu216 Ft4232Hl Connectivity36
Gpio (Mio 22-23)36
Pmu Gpi (Mio 26)36
Pmu Gpo (Mio 32-37)36
Sdio (Mio 39-51)37
Sd Card Interface37
Xczu49Dr To Msp430 Connections37
Ip4856Cx25 U23 Adapter Pinout38
Usb 3.0 Transceiver And Usb 2.0 Ulpi Phy39
Usb Interface40
Gem3 Ethernet (Mio 64-77)41
Usb3320 Ulpi Usb 2.0 Transceiver Circuit41
Ethernet Block Diagram41
10/100/1000 Mhz Tri-Speed Ethernet Phy42
Ethernet Phy Reset42
Ethernet Phy Led Interface42
Ethernet Phy Led Functional Description42
Programmable Logic Jtag Programming Options43
Clock Generation44
Jtag Chain Block Diagram44
Zcu216 Board Clock Sources45
Clock Connections To Zu49Dr U145
Si5341B 10 Independent Output Any-Frequency Clock Generator U4346
Inputs46
Programmable User Si570 Clocks47
Zsfp/Zsfp+ Module Connectors48
User Sma Mgt Clock48
Ddr4 Memory Interface C0 (U47) And C1 (U130) Si57048
Quad-Zsfp Connector Zsfp Locations49
Zsfp Control And Status Board Connections49
User Pmod Gpio Headers51
User I/O51
Power And Status Leds52
Multi-Gigabit Transceivers54
Gty Transceivers54
Gpio And Power Status Led Areas54
Fmcp Hspc55
Zsfp+55
Zcu216 Zu49Dr Gty Mapping55
Ps Gtr Transceivers56
Ps M.2 Sata Connector56
M.2 Connector57
M.2 Connector U40 Pinout57
Zcu216 M.2 U40 Connector Tie-Offs58
Fpga Mezzanine Card Interface59
M.2 U40 Connections To The Xczu49Dr Zynq Ultrascale+ Rfsoc59
Fmcp Connector J2859
Cooling Fan Connector60
Vadj_Fmc Power Rail61
Zcu216 Msp430 System Controller61
Zcu216 Cooling Fan Circuit61
Power On/Off Slide Switch63
Program_B Pushbutton63
Zcu216 Power Input63
System Reset Pushbuttons64
Ps_Por_B Reset64
Board Power System64
Ps_Srst_B Reset64
Zcu216 Power System Devices65
Device Rail Maximum Current66
Monitoring Voltage And Current66
Fmcp Hspc Connector Pinout68
Appendix A: Vita 57.4 Fmcp Connector Pinout68
Appendix B: Xilinx Design Constraints69
Appendix C: Xm650/Xm655 Balun Add-On Cards For Rfsoc Evm70
Xm655: 16T16R Breakout Add-On Card71
Xm650: 16T16R N79 Band Loopback Demo Add-On Card71
Connector72
Rfmc 2.0 Connector Parameters72
Lpam-50-01.0-L-08-2-K-Tr 3D View72
Lpam Connector Drawing73
Xm650/655 Connector Pinout73
Corehc2 Connector Pinout (Xm655 Only)77
Adc 16 Lanes77
Features78
Dac 16 Lanes78
Board Dimensions/Form Factor79
Xm655 Dimensions79
Xm655 Board Dimensions80
Xm650 Board Dimensions81
Functional Description82
Mounting Holes/Keepouts82
Mounting Screws And Standoff Details82
Cables/Smas82
Tm40-0157-00 Landing Pad83
Tmb-V5F2-1L1 Sma Drawing84
Sma To Sma Cable: Carlisle Tm40-0159-00 6"84
Balun/Filter85
Low Frequency Baluns85
Low Frequency Balun Part Number85
Low Frequency Balun Specifications85
Low Frequency Balun Drawing86
Outline Dimensions (Mm)86
Medium Frequency Baluns86
Medium Frequency Balun Part Number86
Medium Frequency Balun Specifications87
Medium Frequency Balun Drawing87
High Frequency Baluns87
High Frequency Balun (4-5 Ghz) Part Number87
High Frequency Balun Specifications88
High Frequency Balun Drawing88
High Frequency Balun (5-6 Ghz) Part Number88
Rf Cages89
N79 Band Balun/Filter90
Band Pass Filter90
N79 Balun90
Header90
High Adcio And Dacio Digital I/O Header Pins91
Appendix D: Regulatory And Compliance Information92
Compliance Markings93
Xilinx Resources94
Appendix E: Additional Resources And Legal Notices94
Documentation Navigator And Design Hubs94
References94
Please Read: Important Legal Notices96