I2C1 Bus Topology; I2C1 Tca9548A U20 Target Device Addresses - Xilinx Zynq UltraScale+ ZCU216 User Manual

Hide thumbs Also See for Zynq UltraScale+ ZCU216:
Table of Contents

Advertisement

The following figure shows a high-level view of the I2C1 bus connectivity.
U1
BANK 500
PS I2C1
MIO17/
MIO16
U1
BANK 89
PL I2C1
D9/C9
U38
MPS430
28 P4_1
29 P4_2
The addresses of each target device on the I2C1 U20 and U22 PCA9548A switches are
identified in the following tables.
Table 11: I2C1 TCA9548A U20 Target Device Addresses
TCA9548A U20 (Addr 0x74) Port
0
1
2
3
4
5
6
UG1390 (v1.1) July 10, 2020
ZCU216 Board User Guide
Figure 8: I2C1 Bus Topology
U18
I2C1_SDA/SCL
L/S
U19
L/S
I2C1 Bus Device
EEPROM U16
Si5341 Clock U43
USER Si570 C0 Clock U47
USER MGT Si570 Clock U48
8A34001 (zSFP ClK Recovery) U409
CLK104 Connector J101
RFMC LPAF-50 Connector J82
Chapter 3: Board Component Descriptions
U20
TCA9548A
IIC_EEPROM_SDA/SCL
SD0/SC0
S15341_SDA/SCL
SD1/SC1
USER_S1570__C0_SDA/SCL
SD2/SC2
SDA/SCL
USER_MGT_S1570_SDA/SCL
SD3/SC3
8A34001_SDA/SCL
SD4/SC5
CLK104_SDA/SCL
SD5/SC5
RFMC_I2C_SDA/SCL
SD6/SC6
Not Connected
SD7/SC7
0x74
U22
TCA9548A
FMCP_HSPC_II_SDA/SCL
SD0/SC0
USER_SI570_C1_SDA/SCL
SD1/SC1
SYSMON_SDA/SCL
SD2/SC2
PS_DDR4_SODIMM_SDA/SCL
SDA/SCL
SD3/SC3
SFP3_IIC_SDA/SCL
SD4/SC5
SFP2_IIC_SDA/SCL
SD5/SC5
SFP1_IIC_SDA/SCL
SD6/SC6
SFP0_IIC_SDA/SCL
SD7/SC7
0x75
Target Device Address
0X54
0x76
0X5D
0X5D
0x58
0x2F
USER
Send Feedback
X23320-100119
www.xilinx.com
34

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Zynq ek-u1-zcu216-es1-gZynq ek-u1-zcu208-es1-gZcu216

Table of Contents