External Eeprom Interface - Renesas M3A-HS64 User Manual

2

2.3.6 External EEPROM Interface

The M3A-HS64 comes standard with an EEPROM listed in the table below. The EEPROM is controlled by the IIC bus interface 3
(IIC3) built in the SH7264.
The EEPROM is write-protected or write-enabled by system setting DIP switches.
The figure below shows the EEPROM Interface Block Diagram. Table 2.3.12 lists the DIP switches setting (SW6-4), and Table
2.3.13 lists the jumpers setting (JP8, and JP9).
Part Number
HN58X24128FPIE
SH7264
Note: Pin names in red
Number
SW6-4 EEPROM is write-protected
Number
IIC3 mode (PE2 is SCL1 output pin, default)
JP8
IIC3 mode (PE3 is SDA1 I/O pin, default)
JP9
Rev. 1.00 Apr 30, 2009
REJ11J0034-0100
Table 2.3.11 EEPROM Specifications
Interface
2-wire serial (IIC)
3.3 V
3.3 V
PE2/SCL1/IRQ2
PE3/SDA1/IRQ3
indicate the function used.
Figure 2.3.7 EEPROM Interface Block Diagram
Table 2.3.12 DIP Switches Setting (SW6-4)
OFF (High)
Table 2.3.13 Jumpers Setting (JP8, and JP9)
1-2
Capacity
16 KB (16 kwords x 8-bit)
HN58X24128FPIE
(16 K words × 8-bit)
JP8
SCL
3.3 V
JP9
SDA
WP
DIP
SW6-4
2
IIC of the D/A converter (M3A-HS64G01),
IRQ input (M3A-HS64G02)
Expansion connector
Function
EEPROM is write-enabled (default)
IRQ mode (PE2 is IRQ2 input pin)
IRQ mode (PE3 is IRQ3 input pin)
M3A-HS64 Functions
2.3.6 External EEPROM Interface
Package
8-pin, SOP
16 KB
Chip address: 000 A2-0
ON (Low)
None (Open)
2-20