3
AK4524 audio codec
RSPI, SSIF, and I/O ports on the SH7264 control the audio codec.
• SH7264 RSPI (Channel 1): Accesses the AK4524 registers to initialize AK4524, and format data
• SH7264 SSIF (Channel 0): Inputs/Outputs the audio data
• SH7264 I/O port (PG24): Powers down AK4524 at low
Note: M3A-HS64 allows selecting either 12.2880 MHz or 11.2896 MHz as the AK4524 system clock.
The figure below shows the audio codec block diagram. Refer to Table 3.4.1 for the jumper setting (JP7).
The plug-in power microphone can be connected when JP3 is shorted.
Number
Plug-in power microphone available
JP3
Rev. 1.00 Apr 30, 2009
REJ11J0034-0100
Powers up AK4524 at high
Figure 3.4.2 Audio Codec Block Diagram
Table 3.4.2 Jumper Setting (JP3)
1-2
M3A-HS64G01 Functions
None (Open)
Typical microphone available (default)
3.4 Audio Modules
3-18