Memory Maps - Renesas M3A-HS64 User Manual

Renesas 32-bit risc microcomputer superhtm risc engine family/sh7260 series
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1.17 Memory Maps

The following figure shows memory map examples of the SH7264 and the M3A-HS64.
Logic address
H'0000 0000
H'0040 0000
H'0400 0000
H'0800 0000
H'0C00 0000
H'0E00 0000
H'1000 0000
H'1400 0000
H'1800 0000
H'1C00 0000
H'1C10 0000
H'2000 0000
H'4000 0000
H'8000 0000
H'FFF8 0000
H'FFF9 0000
H'FFFC 0000
H'FFFF FFFF
Rev. 1.00 Apr 30, 2009
REJ11J0034-0100
SH7264 logic space
CS0 space: 64 MB
CS1 space: 64 MB
CS2 space: 64 MB
CS3 space: 64 MB
CS4 space: 64 MB
CS5 space: 64 MB
CS6 space: 64 MB
Others: 64 MB
CS0 to CS6 space and others
(Cache-disabled)
Reserved
(Do not use)
Reserved
(Do not use)
High-speed internal RAM: 64 KB
Internal RAM, Reserved
(Do not use)
On-chip peripherals, Reserved
Figure 1.17.1 SH7264 Memory Map Example
M3A-HS64
Memory Map
Flash memory (4 MB)
16-bit bus
User area
User area
User area
SDRAM (16 MB)
16-bit bus
User area
User area
User area
User area
Large-capacity internal RAM: 1 MB
CS0 to CS6 space and others
(Cache-disabled)
Reserved
(Do not use)
Reserved
(Do not use)
High-speed internal RAM: 64 KB
Internal RAM, Reserved
(Do not use)
On-chip peripherals, Reserved
Overview
1.17Memory Maps
1-25

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