User Pushbutton Switches (Active-High); Cpu Reset Pushbutton Switch (Active-Low) - Xilinx ML405 User Manual

Chapter 1: ML405 Evaluation Platform

8. User Pushbutton Switches (Active-High)

There are five active-High user pushbutton switches available for general-purpose usage
and arranged in a north-east-south-west-center orientation (only the center one is cited in
Figure 1-2, page
Table 1-6: User Pushbutton Switch Connections

9. CPU Reset Pushbutton Switch (Active-Low)

The CPU reset pushbutton switch is active-Low and is used as a system or user reset
button. This pushbutton switch is wired only to an FPGA I/O pin so it can also be used as
a general-purpose pushbutton switch
Table 1-7: CPU Reset Pushbutton Switch Connections
16
10). Table 1-6
Reference
Label/Definition
Designator
SW3 GPIO_SW_N
SW5 GPIO_SW_E
SW4 GPIO_SW_S
SW7 GPIO_SW_W
SW6 GPIO_SW_C
Reference
Label/Definition
Designator
SW10 CPU Reset
www.xilinx.com
summarizes the user pushbutton switch connections.
FPGA Pin
G11
M6
L10
K8
D6
(Table 1-7).
FPGA Pin
M5
ML405 Evaluation Platform
UG210 (v1.5.1) March 10, 2008
R