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Frequency Synthesizer for SFP/SMA MGT Clocking
An Integrated Circuit Systems ICS843001-21 frequency synthesizer chip offers flexible,
low-jitter clock generation for the MGT pair connected to SFP and SMA interfaces. The
ICS843001-21 is connected to a 19.44-MHz crystal and a socketed 25-MHz oscillator (X7).
DIP switches (SW14) enable the user to select clock source and frequency synthesis options
to generate a number of commonly used frequencies for applications, such as Gigabit
Ethern et and SONET
sheet for more information. The 25-MHz oscillator is socketed to allow the user to change
the oscillator frequency and use the entire range of possible synthesized frequency
outputs.
Table 1-19: Configurations for Clock Source and Frequency Options
DIP Switch SW14 [1:8] Value
SEL1 SEL0 M2
M1
M0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
1
0
0
1
1
1
0
0
1
1
1
0
0
1
0
1
0
0
1
0
1
0
0
1
1
Notes:
1. Factory default setting.
2. A 1 equates to the DIP switch in the on position.
3. For Fibre Channel support, see
The native output of the ICS843001-21 is LVPECL, so a resistor network is present to
change the voltage swing to LVDS levels. The LVDS output is then multiplexed out
through Series AC coupling capacitors to allow the clock input of the FPGA to set the
common mode voltage.
ML405 Evaluation Platform
UG210 (v1.5.1) March 10, 2008
(Table
Input Ref
Clock
N2
N1
N0
(MHz)
19.44
0
1
1
19.44
1
1
0
19.44
0
0
0
19.44
0
0
1
25
1
0
0
25
1
1
1
25
1
0
1
25
0
1
1
25
0
1
1
Answer Record
24921.
www.xilinx.com
1-19). For other frequencies, consult the ICS843001-21 data
M Divider
N Divider
V
CO
Value
Value
(MHz)
32
4
622.08
32
8
622.08
32
1
622.08
32
2
622.08
25
5
625
25
10
625
24
6
600
24
4
600
25
4
625
Detailed Description
Output
Frequency
Application
(MHz)
155.52
SONET
77.76
SONET
622.08
SONET
(1)
311.04
SONET
125
Gigabit Ethernet
62.5
Gigabit Ethernet
100
PCI Express
150
SATA
156.25
XAUI/SRIO
31
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