User Leds (Active High); User Dip Switches (Active High) - Xilinx Kintex-7 FPGA KC724 User Manual

Chapter 1: KC724 Board Features and Operation

User LEDs (Active High)

Callout 23,
DS13 through DS20 are eight active-High LEDs that are connected to user I/O pins on the
FPGA as shown in
purpose determined by the user.
Table 1-9: User LEDs
Pin Function
A20 User LED
A17 User LED
A16 User LED
B20 User LED
C20 User LED
F17 User LED
G17 User LED
B17 User LED

User DIP Switches (Active High)

Callout 24,
The DIP switch SW2 provides a set of eight active-High switches that are connected to user
I/O pins on the FPGA as shown in
any other purpose. Six of the eight I/Os also map to 2 x 6 test header J125 providing
external access for these pins (callout 25,
Table 1-10: User DIP Switches
FPGA (U1)
Pin Function
E18 User switch
B19 User switch
C19 User switch
A22 User switch
B22 User switch
A18 User switch
B18 User switch
A21 User switch
22
Send Feedback
Figure 1-2.
Table 1-10 These LEDs can be used to indicate status or any other
FPGA (U1)
Direction IOSTANDARD
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Figure 1-2.
Direction IOSTANDARD
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
Input LVCMOS18
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Schematic Net
Name
APP_LED1
APP_LED2
APP_LED3
APP_LED4
APP_LED5
APP_LED6
APP_LED7
APP_LED8
Table 1-10. These pins can be used to set control pins or
Figure 1-2.).
Schematic DIP Switch
Net Name Reference
USER_SW1
USER_SW2
USER_SW3
USER_SW4
SW2
USER_SW5
USER_SW6
USER_SW7
USER_SW8
KC724 GTX Transceiver Characterization Board
Reference
Designator
DS19
DS20
DS17
DS18
DS16
DS15
DS13
DS14
J125 Test
Header Pin
2
4
6
8
10
12
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UG932 (v2.2) October 10, 2014