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Preface: About This Guide
Online Document
The following conventions are used in this document:
6
Convention
Commands that you select from
a menu
Helvetica bold
Keyboard shortcuts
Variables in a syntax statement
for which you must supply
values
Italic font
References to other manuals
Emphasis in text
An optional entry or parameter.
However, in bus specifications,
Square brackets [ ]
such as bus[7:0], they are
required.
A list of items from which you
Braces { }
must choose one or more
Separates items in a list of
Vertical bar |
choices
Vertical ellipsis
.
Repetitive material that has
.
been omitted
.
Repetitive material that has
Horizontal ellipsis . . .
been omitted
Convention
Cross-reference link to a location
Blue text
in the current document
Cross-reference link to a location
Red text
in another document
Blue, underlined text
Hyperlink to a website (URL)
www.xilinx.com
Meaning or Use
Meaning or Use
Example
File → Open
Ctrl+C
ngdbuild design_name
See the Development System
Reference Guide for more
information.
If a wire is drawn so that it
overlaps the pin of a symbol, the
two nets are not connected.
ngdbuild [option_name]
design_name
lowpwr ={on|off}
lowpwr ={on|off}
IOB #1: Name = QOUT'
IOB #2: Name = CLKIN'
.
.
.
allow block block_name loc1
loc2 ... locn;
Example
See the section
"Additional
Resources"
for details.
Refer to
"Title Formats" in
Chapter 1
for details.
See
Figure 2-5
in the Virtex-II
Platform FPGA User Guide.
Go to
http://www.xilinx.com
for the latest speed files.
ML405 Evaluation Platform
UG210 (v1.5.1) March 10, 2008
R
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