Data Shifting; Shift Register - Sft(10) - Omron SYSMAC C2000H Operation Manual

Data Shifting

5-13

Data Shifting

5-13-1 SHIFT REGISTER – SFT(10)
Limitations
Description
E
Lost
data
Flags
All of the instructions described in this section are used to shift data, but in
differing amounts and directions. The first shift instruction, SFT(10), shifts an
execution condition into a shift register; the rest of the instructions shift data
that is already in memory.
Ladder Symbol
I
P
R
E must be less than or equal to St, and St and E must be in the same data
area.
If a bit address in one of the words used in a shift register is also used in an
instruction that controls individual bit status (e.g., OUT, KEEP(11), SET<07>),
an error ("COIL DUPL") will be generated when program syntax is checked
on the Programming Console or another Programming Device. The program,
however, will be executed as written. See Example 2: Controlling Bits in Shift
Registers for a programming example that does this.
SFT(10) is controlled by three execution conditions, I, P, and R. If SFT(10) is
executed and 1) execution condition P is ON and was OFF the last execution
and 2) R is OFF, then execution condition I is shifted into the rightmost bit of
a shift register defined between St and E, i.e., if I is ON, a 1 is shifted into the
register; if I is OFF, a 0 is shifted in. When I is shifted into the register, all bits
previously in the register are shifted to the left and the leftmost bit of the reg-
ister is lost.
St+1, St+2, ...
The execution condition on P functions like a differentiated instruction, i.e., I
will be shifted into the register only when P is ON and was OFF the last time
SFT(10) was executed. If execution condition P has not changed or has gone
from ON to OFF, the shift register will remain unaffected.
St designates the rightmost word of the shift register; E designates the left-
most. The shift register includes both of these words and all words between
them. The same word may be designated for St and E to create a 16-bit (i.e.,
1-word) shift register.
When execution condition R goes ON, all bits in the shift register will be
turned OFF (i.e., set to 0) and the shift register will not operate until R goes
OFF again.
There are no flags affected by SFT(10).
Operand Data Areas
SFT(10)
St
E
Section 5-13
St: Starting word
IR, AR, HR, LR
E: End word
IR, AR, HR, LR
St
Execution
condition I
127