IBM 74Y4064 Handbook page 146

v The adapter provides message signal interrupts (MSI), MSI-X, and support of legacy pin interrupts.
v The adapter supports jumbo frames up to 9.6 KB.
v The adapter supports gigabit EtherChannel (GEC) with the existing software.
v The adapter supports TCP checksum offload transmission control protocol (TCP), user datagram
protocol (UDP), TCP segmentation Offload (TSO) for IPv4 and IPv6.
v Supports TCP segmentation or large send offload
v Supports EEPROM-SPI and single EEPROM
v Compliant with European Union Directive 2002/95/EC on the Restriction of the Use of Certain
Hazardous Substances in Electrical and Electronic Equipment
Figure 59. PCIe3 2-port 10 GbE NIC and RoCE SR adapter
Specifications
Item Description
Adapter FRU number
00RX875 (Designed to comply with RoHS requirement)
Full-height tailstock part number
I/O bus architecture
PCIe3 x8
Slot requirement
For more information about slot priorities, maximums, and placement rules, see PCIe adapter
placement rules and slot priorities (http://www.ibm.com/support/knowledgecenter/POWER9/
p9eab/p9eab_mtm_pciplacement.htm) and select the system that you are working on.
Voltage
3.3 V
Form factor
Short
Cables
Supports standard 10-Gb SR optical cabling and up to 300 m (984.25 ft) cable length.
130
Managing PCIe adapters