A.C. Characteristics
Symbol
Parameter
System Clock
f
SYS1
(HXT, ERC, HIRC)
f
8MHz HIRC
SYS2
f
4MHz HIRC
SYS3
f
2MHz HIRC
SYS4
f
910kHz HIRC
SYS5
f
System Clock (LXT)
LXT
f
4MHz ERC (Note 3)
ERC
t
32kHz RC Period
LIRC
t
External Reset Low Pulse Width
RES
t
Low Voltage width to Reset
LVR
t
Low Voltage width to Interrupt
LVD
t
LVDO Stable Time
LVDS
System Reset Delay Time
t
RSTD
(Power-on Reset)
System start-up timer period
t
SST1
(W/O fast start-up) of HXT/TBC
System start-up timer period of
t
SST2
ERC, HIRC, EC
System start-up timer period
t
SST3
(With fast start-up) of HXT/TBC
System start-up timer period
t
SST4
(With fast start-up) of HXT/TBC
t
Interrupt Pulse Width
INT
t
A/D Clock Period
AD
t
A/D Conversion Time
ADC
t
A/D on to A/D Start
ON2ST
Note: 1. t
=1/f
; t
=1/f
SYS
SYS
SUB
SUB
2. t
is period of LXT or LIRC and it will not stop at Idle mode.
TBC
3. For f
, as the resistor tolerance will influence the frequency a precision resistor is recommended.
ERC
4. ADC conversion time (t
ADC clock (t
).
AD
Rev. 1.40
TinyPower
Flash MCU with OPA & Comparators
TM
Test Conditions
V
DD
2.2V~5.5V
—
3.3V~5.5V
3.3V
Ta=25˚C
3.3V
Ta=-40~85˚C
2.7V~5.5V Ta=-40~85˚C
3.3V
Ta=25˚C
3.3V
Ta=-40~85˚C
2.7V~5.5V Ta=-40~85˚C
3.3V
Ta=25˚C
3.3V
Ta=-40~85˚C
2.7V~5.5V Ta=-40~85˚C
3.3V
Ta=25˚C
3.3V
Ta=-40~85˚C
2.7V~5.5V Ta=-40~85˚C
—
3.3V
R=150kΩ, Ta=25˚C
3.3V
R=150kΩ, Ta=-40~85˚C
2.7V~5.5V R=150kΩ, Ta=-40~85˚C
3V
—
—
—
LVR disable, LVD enable,
5V
V
is ready
BG
—
Power up or wake-up from
—
Sleep mode
Power up or wake-up from
—
HALT (Idle or Sleep mode)
wake-up from Idle mode
—
(f
=f
SL
TBC)
wake-up from Idle mode
—
(f
=f
SL
LIRC
—
—
Note 4
—
—
2.2V~5.5V
)=n (bits ADC) + 4 (sampling time). The conversion for each bit needs one
AD
16
HT45F23A/HT45F24A
Min.
Typ.
Conditions
400
—
400
—
-2%
8
-5%
8
-10%
8
-2%
4
-5%
4
-10%
4
-2%
2
-5%
2
-10%
2
-2%
0.91
-5%
0.91
-10%
0.91
—
—
32.768
-2%
4
-8%
4
-15%
4
—
28.10 31.25 34.40
—
1
—
—
60
120
—
60
120
—
—
—
—
100
—
1024
—
1
—
1
—
1
)
—
1
—
—
0.5
—
—
—
16
2
—
Ta=25˚C
Max.
Unit
4000
kHz
8000
kHz
+2%
MHz
+5%
MHz
+10%
MHz
+2%
MHz
+5%
MHz
+10%
MHz
+2%
MHz
+5%
MHz
+10%
MHz
+2%
MHz
+5%
MHz
+10%
MHz
—
kHz
+2%
MHz
+8%
MHz
+15%
MHz
µs
—
µs
240
µs
240
µs
100
µs
—
ms
—
t
*
note 1
SYS
2
t
SYS
2
t
note 2
TBC
2
t
LIRC
—
µs
—
µs
—
t
AD
—
µs
March 29, 2019
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