Operational Amplifiers; Operational Amplifier Registers - Holtek HT45F23A Manual

HT45F23A/HT45F24A
TinyPower Flash MCU with OPA & Comparators
TM

Operational Amplifiers

There are two fully integrated Operational Amplifiers in the devices, OPA1 and OPA2. These OPAs
can be used for signal amplification according to specific user requirements. The OPAs can be
disabled or enabled entirely under software control using internal registers. With specific control
registers, some OPA related applications can be more flexible and easier to be implemented, such as
Unit Gain Buffer, Non-Inverting Amplifier, Inverting Amplifier and various kinds of filters, etc.

Operational Amplifier Registers

The internal Operational Amplifiers are fully under the control of internal registers, OPA1C0,
OPA1C1, OPA2C0, OPA2C1 and OPA2C2. These registers control enable/disable function, input
path selection, gain control and polarity.
OPA1C0 Register
Bit 7
Name A1X
R/W R
POR 0
Bit 7 A1X: Operational amplifier output; positive logic. This bit is read only.
Bit 6~0 Undefined
OPA1C1 Register
Bit
Name A1O2CIN
R/W R/W
POR
Bit 7 A1O2CIN: OPA1 output to comparator input control bit
0: disable
1: enable
The A1O2CIN bit should be set to 1 after the CNPSEL bit is set to 0 to ensure that the
OPA1 output is successfully selected as the comparator input.
A1O2N: OPA1 output to OPA1 Inverting input control bit
Bit 6
0: disable
1: enable
This bit is only available when the A1EN bit is set to 1. If the A1EN bit is set to 0, the
A1O2N bit will be cleared to 0 by hardware.
Bit 5~4 A1PSEL1, A1PSEL0: OPA1 Non-inverting input selection bit
00: no connection
01: from VH1 (0.9×V
10: from VM (0.5×V
11: from VL1 (0.1×V
To select the VH1, VM or VL1 as the OPA1 non-inverting input signal by setting the
A2PSEL bit field, the A1PS bit should first be set to 0.
Bit 3 A1PS: A1P pin to OPA1 Non-inverting input control bit
0: no connection
1: from A1P pin
If this bit is set to 1, the A1PSEL field will be cleared to 0 by hardware.
A1NS: A1N pin to OPA1 Inverting input control bit
Bit 2
0: no connection
1: from A1N pin
Rev. 1.40
6 5
— —
— —
— —
7 6 5
A1O2N A1PSEL1 A1PSEL0
R/W R/W
0 0 0
)
LDO
or 0.5×V
DD
or 0.1×V
DD
109
4 3 2
— — —
— — —
— — —
4 3 2
A1PS A1NS
R/W R/W R/W
0 1 1
)
LDO
)
LDO
1 0
— —
— —
— —
1 0
A1OEN A1EN
R/W R/W
0 0
March 29, 2019