Time Base Interrupt - Holtek HT45F23A Manual

HT45F23A/HT45F24A
TinyPower Flash MCU with OPA & Comparators
TM

Time Base Interrupt

The function of the Time Base Interrupts is to provide regular time signal in the form of an internal
interrupt. They are controlled by the overflow signals from their respective timer functions. When
these happens their respective interrupt request flags, TB0F or TB1F will be set. To allow the
program to branch to their respective interrupt vector addresses, the global interrupt enable bit, EMI,
Multi-function interrupt enable bit, EMFI and Time Base enable bits, TB0E or TB1E, must first be
set. When the interrupt is enabled, the stack is not full and the Time Base overflows, a subroutine
call to their respective vector locations will take place. When the interrupt is serviced, the respective
interrupt request flag, TB0F or TB1F, will be automatically reset and the EMI bit will be cleared to
disable other interrupts.
The purpose of the Time Base Interrupt is to provide an interrupt signal at fixed time periods. Their
clock sources originate from the internal clock source f
divider, the division ratio of which is selected by programming the appropriate bits in the TBC
register to obtain longer interrupt periods whose value ranges. The clock source that generates f
which in turn controls the Time Base interrupt period, can originate from several different sources,
as shown in the System Operating Mode section.
TBC Register
Bit
Name TBON
R/W R/W
POR
Bit 7 TBON: TB0 and TB1 Control
0: disable
1: enable
Bit 6 TBCK: Select f
0: f
1: f
TB11~TB10: Select Time Base 1 Time-out Period
Bit 5~4
00: 4096/f
01: 8192/f
10: 16384/f
11: 32768/f
Bit 3 LXTLP: LXT Low Power Control
0: disable
1: enable
Bit 2~0 TB02~TB00: Select Time Base 0 Time-out Period
000: 256/f
001: 512/f
010: 1024/f
011: 2048/f
100: 4096/f
101: 8192/f
110: 16384/f
111: 32768/f
Rev. 1.40
f / 4
S Y S
L X T
M
M
U
U
f
T B C
X
L I R C
X
C o n f i g u r a t i o n
T B C K B i t
O p t i o n
Time Base Interrupt
7 6 5
TBCK TB11
R/W R/W
0 0 0
Clock
TB
TBC
/4
SYS
TB
TB
TB
TB
TB
TB
TB
TB
TB
TB
TB
TB
129
. This f input clock passes through a
TB TB
T B 0 2 ~ T B 0 0
2 ~ 2 T i m e B a s e 0 I n t e r r u p t
8 1 5
f
T B
T i m e B a s e 1 I n t e r r u p t
2 ~ 2
1 2 1 5
T B 1 1 ~ T B 1 0
T o B u z z e r
4 3 2
TB10 LXTLP TB02
R/W R/W R/W
0 0 0
,
TB
1 0
TB01 TB00
R/W R/W
0 0
March 29, 2019