Pin Description - Holtek HT45F23A Manual

HT45F23A/HT45F24A
TinyPower Flash MCU with OPA & Comparators
TM

Pin Description

Pin Name Function
PA0
PA0/CNP/SCOM0
CNP
SCOM0
PA1
PA1/C1OUT/TC0
C1OUT
TC0
PA2
PA2/A1P/C2OUT
A1P
C2OUT
PA3
PA3/A1N/INT0
A1N
INT0
PA4
PA4/A1E/TC1
A1E
TC1
PA5
PA5/A2P/PFD
A2P
PFD
PA6
PA6/A2N/BZ
A2N
BZ
PA7
PA7/A2E/BZ
A2E
BZ
PB0
PB0/SDO/INT1
SDO
INT1
PB1
PB1/SDI/SDA
SDI
SDA
PB2
PB2/SCK/SCL
SCK
SCL
PB3
PB3/AN0/SCS
AN0
SCS
Rev. 1.40
OPT I/T O/T
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
CMP1C1 CMPI — Comparator input pin
LCDC — SCOM Software controlled 1/2 bias LCD COM
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
CMP1C1 — CMPO Comparator 1 output pin
— ST — External Timer 0 clock input
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA1C1 OPAI — OPA1 non-inverting input pin
CMP2C1 — CMPO Comparator 2 output pin
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA1C1 OPAI — OPA1 inverting input pin
— ST — External interrupt 0 input pin
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA1C1 — OPAO OPA1 output pin
— ST — External Timer 1 clock input
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA2C1 OPAI — OPA2 non-inverting input pin
MISC — CMOS PFD output
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA2C1 OPAI — OPA2 inverting input pin
BPCTL — CMOS Buzzer output
PAPU
ST CMOS General purpose I/O. Register enabled pull-up, wake-up
PAWU
OPA2C1 — OPAO OPA2 output pin
BPCTL — CMOS Complementary buzzer output
PBPU CMOS General purpose I/O. Register enabled pull-up and
ST
MISC NMOS output NMOS structure.
— — CMOS SPI data output
— ST — External interrupt 1 input pin
PBPU CMOS General purpose I/O. Register enabled pull-up and
ST
MISC NMOS output NMOS structure.
— ST — SPI data input
— ST NMOS I C data
2
PBPU CMOS General purpose I/O. Register enabled pull-up and
ST
MISC NMOS output NMOS structure.
— ST — SPI serial clock
— ST NMOS I C clock
2
PBPU CMOS General purpose I/O. Register enabled pull-up and
ST
MISC NMOS output NMOS structure.
ADCR AN — A/D channel 0
— ST — SPI slave select
11
Description
March 29, 2019