HT45F23A/HT45F24A
TinyPower
Flash MCU with OPA & Comparators
TM
S t a r t
S C L
S D A
S C L
S D A
S = S t a r t ( 1 b i t )
S A = S l a v e A d d r e s s ( 7 b i t s )
S R = S R W
M = S l a v e d e v i c e s e n d a c k n o w l e d g e b i t ( 1 b i t )
D = D a t a ( 8 b i t s )
A = A C K ( R X A K b i t f o r t r a n s m i t t e r , T X A K b i t f o r r e c e i v e r 1 b i t )
P = S t o p ( 1 b i t )
S
S A
Note: * When a slave address is matched, the device must be placed in either the transmit mode
and then write data to the SIMD register, or in the receive mode where it must implement a
dummy read from the SIMD register to release the SCL line.
R e a d f r o m
S I M D t o r e l e a s e
S C L l i n e
R E T I
D u m m y r e a d f r o m
S I M D t o r e l e a s e
Rev. 1.40
S l a v e A d d r e s s
1
0
1
1
D a t a
1
0
0
1
0
b i t ( 1 b i t )
M
D
A
D
A
S R
I
C Communication Timing Diagram
2
N o
N o
Y e s
H T X = 1
?
Y e s
R X A K = 1
?
N o
C L R H T X
W r i t e d a t a t o S I M D
C L R T X A K
r e l e a s e S C L L i n e
R E T I
S C L L i n e
R E T I
I
C Bus ISR Flow Chart
2
103
S R W
A C K
0
1
0
1
0
A C K
S t o p
1
0
0
M
D
A
D
A
S
S A
S R
S t a r t
Y e s
H A A S = 1
?
Y e s
S R W = 1
?
S E T H T X
D u m m y r e a d f r o m
W r i t e d a t a t o S I M D
t o r e l e a s e S C L L i n e
R E T I
P
N o
C L R H T X
C L R T X A K
S I M D t o r e l e a s e
S C L L i n e
R E T I
March 29, 2019
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