I
C Interface Operation
2
The I
C serial interface is a two line interface, a serial data line, SDA, and serial clock line, SCL. As
2
many devices may be connected together on the same bus, their outputs are both open drain types.
For this reason it is necessary that external pull-high resistors are connected to these outputs. Note
that no chip select line exists, as each device on the I
will be transmitted and received on the I
When two devices communicate with each other on the bidirectional I
master device and one as the slave device. Both master and slave can transmit and receive data,
however, it is the master device that has overall control of the bus. For these devices, which only
operates in slave mode, there are two methods of transferring data on the I
mode and the slave receive mode.
There are several configuration options associated with the I
the function which selects the SIM pins rather than normal I/O pins. Note that if the configuration
option does not select the SIM function then the SIMEN bit in the SIMC0 register will have no
effect. A configuration option exists to allow a clock other than the system clock to drive the I
interface. Another configuration option determines the debounce time of the I
the internal clock to in effect add a debounce time to the external clock to reduce the possibility of
glitches on the clock line causing erroneous operation. The debounce time, if selected, can be chosen
to be either 1 or 2 system clocks.
I
C Registers
2
There are three control registers associated with the I
data register, SIMD. The SIMD register, which is shown in the above SPI section, is used to store
the data being transmitted and received on the I
the I
C bus, the actual data to be transmitted must be placed in the SIMD register. After the data is
2
received from the I
or reception of data from the I
Note that the SIMA register also has the name SIMC2 which is used by the SPI function. Bit SIMEN
and bits SIM2~SIM0 in register SIMC0 are used by the I
Rev. 1.40
TinyPower
Flash MCU with OPA & Comparators
TM
C bus.
2
2
C bus, the microcontroller can read it from the SIMD register. Any transmission
2
C bus must be made via the SIMD register.
2
S T A R T s i g n a l
f r o m
M a s t e r
S e n d s l a v e a d d r e s s
a n d R / W
b i t f r o m
A c k n o w l e d g e
f r o m
S e n d d a t a b y t e
f r o m
M a s t e r
A c k n o w l e d g e
f r o m
S T O P s i g n a l
f r o m
M a s t e r
96
HT45F23A/HT45F24A
C bus is identified by a unique address which
2
C bus, one is known as the
2
C bus, the slave transmit
2
C interface. One of these is to enable
2
C interface. This uses
2
C bus, SIMC0, SIMC1 and SIMA and one
2
C bus. Before the microcontroller writes data to
C interface.
2
M a s t e r
s l a v e
s l a v e
C
2
March 29, 2019
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